X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Frigol-ds%2Fapi.c;h=a20dd6594fa070623aa91a5c7091bbe143c0529f;hb=cf9f4bc5b0bf5ceef6ccfff7bdbf6b4ac2fd7486;hp=201a6f5d79e9ea414b93f050d9e78338f115c6e1;hpb=962af1a379f2c1715b22f0779ed3ebc6f0d8c2ec;p=libsigrok.git diff --git a/hardware/rigol-ds/api.c b/hardware/rigol-ds/api.c index 201a6f5d..a20dd659 100644 --- a/hardware/rigol-ds/api.c +++ b/hardware/rigol-ds/api.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include "libsigrok.h" #include "libsigrok-internal.h" @@ -40,6 +41,8 @@ static const int32_t hwcaps[] = { SR_CONF_TRIGGER_SLOPE, SR_CONF_HORIZ_TRIGGERPOS, SR_CONF_NUM_TIMEBASE, + SR_CONF_LIMIT_FRAMES, + SR_CONF_SAMPLERATE, }; static const int32_t analog_hwcaps[] = { @@ -51,6 +54,7 @@ static const int32_t analog_hwcaps[] = { static const uint64_t timebases[][2] = { /* nanoseconds */ + { 1, 1000000000 }, { 2, 1000000000 }, { 5, 1000000000 }, { 10, 1000000000 }, @@ -88,7 +92,7 @@ static const uint64_t timebases[][2] = { { 100, 1 }, { 200, 1 }, { 500, 1 }, - /* { 1000, 1 }, Confuses other code? */ + { 1000, 1 }, }; static const uint64_t vdivs[][2] = { @@ -117,6 +121,8 @@ static const uint64_t vdivs[][2] = { static const char *trigger_sources[] = { "CH1", "CH2", + "CH3", + "CH4", "EXT", "AC Line", "D0", @@ -154,26 +160,43 @@ static const char *data_sources[] = { * name, series, protocol flavor, min timebase, max timebase, min vdiv, * digital channels, number of horizontal divs */ + +#define RIGOL "Rigol Technologies" +#define AGILENT "Agilent Technologies" +#define RIGOL_SHORT "Rigol" +#define AGILENT_SHORT "Agilent" + static const struct rigol_ds_model supported_models[] = { - {"DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 12}, - {"DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12}, - {"DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12}, - {"DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 12}, - {"DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12}, - {"DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12}, - {"DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14}, - {"DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14}, - {"DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, false, 14}, - {"VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14}, + {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, + {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, + {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, }; SR_PRIV struct sr_dev_driver rigol_ds_driver_info; @@ -202,6 +225,7 @@ static int dev_clear(void) static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...) { + struct dev_context *devc = sdi->priv; va_list args; int ret; @@ -212,12 +236,14 @@ static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...) if (ret != SR_OK) return SR_ERR; - /* When setting a bunch of parameters in a row, the DS1052E scrambles - * some of them unless there is at least 100ms delay in between. */ - sr_spew("delay %dms", 100); - g_usleep(100000); - - return SR_OK; + if (devc->model->series == RIGOL_DS1000) { + /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */ + sr_spew("delay %dms", 100); + g_usleep(100000); + return SR_OK; + } else { + return sr_scpi_get_opc(sdi->conn); + } } static int init(struct sr_context *sr_ctx) @@ -229,43 +255,21 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev { struct dev_context *devc; struct sr_dev_inst *sdi; - const char *usbtmc_prefix = "/dev/usbtmc"; - const char *tcp_prefix = "tcp/"; - gchar **tokens, *address, *port; struct sr_scpi_dev_inst *scpi; struct sr_scpi_hw_info *hw_info; struct sr_probe *probe; + long n[3]; unsigned int i; const struct rigol_ds_model *model = NULL; - gchar *channel_name; + gchar *channel_name, *vendor, **version; *devices = NULL; - if (strncmp(resource, usbtmc_prefix, strlen(usbtmc_prefix)) == 0) { - sr_dbg("Opening USBTMC device %s", resource); - if (!(scpi = scpi_usbtmc_dev_inst_new(resource))) - return SR_ERR_MALLOC; - } else if (strncmp(resource, tcp_prefix, strlen(tcp_prefix)) == 0) { - sr_dbg("Opening TCP connection %s", resource); - tokens = g_strsplit(resource + strlen(tcp_prefix), "/", 0); - address = tokens[0]; - port = tokens[1]; - if (!address || !port || tokens[2]) { - sr_dbg("Invalid parameters"); - g_strfreev(tokens); - return SR_ERR_ARG; - } - scpi = scpi_tcp_dev_inst_new(address, port); - g_strfreev(tokens); - if (!scpi) - return SR_ERR_MALLOC; - } else { - sr_dbg("Opening serial device %s", resource); - if (!(scpi = scpi_serial_dev_inst_new(resource, serialcomm))) - return SR_ERR_MALLOC; - } + if (!(scpi = scpi_dev_inst_new(resource, serialcomm))) + return SR_ERR; if (sr_scpi_open(scpi) != SR_OK) { + sr_info("Couldn't open SCPI device."); sr_scpi_free(scpi); return SR_ERR; }; @@ -277,28 +281,30 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev return SR_ERR; } - if (strcasecmp(hw_info->manufacturer, "Rigol Technologies")) { - sr_scpi_hw_info_free(hw_info); - sr_scpi_free(scpi); - return SR_ERR_NA; - } - for (i = 0; i < ARRAY_SIZE(supported_models); i++) { - if (!strcmp(hw_info->model, supported_models[i].name)) { + if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) && + !strcmp(hw_info->model, supported_models[i].name)) { model = &supported_models[i]; break; } } + if (!strcmp(hw_info->manufacturer, RIGOL)) + vendor = RIGOL_SHORT; + else if (!strcmp(hw_info->manufacturer, AGILENT)) + vendor = AGILENT_SHORT; + else + vendor = hw_info->manufacturer; if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE, - hw_info->manufacturer, hw_info->model, + vendor, hw_info->model, hw_info->firmware_version))) { sr_scpi_hw_info_free(hw_info); + sr_scpi_close(scpi); sr_scpi_free(scpi); return SR_ERR_NA; } - sr_scpi_hw_info_free(hw_info); + sr_scpi_close(scpi); sdi->conn = scpi; @@ -310,11 +316,39 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev devc->limit_frames = 0; devc->model = model; + devc->protocol = model->protocol; + + /* DS1000 models with firmware before 0.2.4 used the old + * legacy protocol. */ + if (model->series == RIGOL_DS1000) { + version = g_strsplit(hw_info->firmware_version, ".", 0); + do { + if (!version[0] || !version[1] || !version[2]) + break; + if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0) + break; + for (i = 0; i < 3; i++) { + if (sr_atol(version[i], &n[i]) != SR_OK) + break; + } + if (i != 3) + break; + if (n[0] != 0 || n[1] > 2) + break; + if (n[1] == 2 && n[2] > 3) + break; + sr_dbg("Found DS1000 firmware < 0.2.4, using old protocol."); + devc->protocol = PROTOCOL_LEGACY; + } while(0); + g_strfreev(version); + } + + sr_scpi_hw_info_free(hw_info); - for (i = 0; i < 2; i++) { - channel_name = (i == 0 ? "CH1" : "CH2"); - if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name))) + for (i = 0; i < model->analog_channels; i++) { + if (!(channel_name = g_strdup_printf("CH%d", i + 1))) return SR_ERR_MALLOC; + probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name); sdi->probes = g_slist_append(sdi->probes, probe); devc->analog_groups[i].name = channel_name; devc->analog_groups[i].probes = g_slist_append(NULL, probe); @@ -346,12 +380,9 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev devc->num_timebases = &timebases[i] - devc->timebases + 1; } - for (i = 0; i < NUM_VDIV; i++) { - if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) { + for (i = 0; i < NUM_VDIV; i++) + if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) devc->vdivs = &vdivs[i]; - devc->num_vdivs = NUM_VDIV - (&vdivs[i] - &vdivs[0]); - } - } if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE))) return SR_ERR_MALLOC; @@ -450,8 +481,13 @@ static int dev_open(struct sr_dev_inst *sdi) static int dev_close(struct sr_dev_inst *sdi) { struct sr_scpi_dev_inst *scpi; + struct dev_context *devc; scpi = sdi->conn; + devc = sdi->priv; + + if (devc->model->series != RIGOL_VS5000) + set_cfg(sdi, ":KEY:LOCK DISABLE"); if (scpi) { if (sr_scpi_close(scpi) < 0) @@ -467,40 +503,90 @@ static int cleanup(void) return dev_clear(); } +static int analog_frame_size(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + struct sr_probe *probe; + int analog_probes = 0; + GSList *l; + + switch (devc->model->series) { + case RIGOL_VS5000: + return VS5000_ANALOG_LIVE_WAVEFORM_SIZE; + case RIGOL_DS1000: + return DS1000_ANALOG_LIVE_WAVEFORM_SIZE; + default: + for (l = sdi->probes; l; l = l->next) { + probe = l->data; + if (probe->type == SR_PROBE_ANALOG && probe->enabled) + analog_probes++; + } + if (devc->data_source == DATA_SOURCE_MEMORY) { + if (analog_probes == 1) + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C; + else + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C; + } else { + if (devc->model->series == AGILENT_DSO1000) + return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE; + else + return DS2000_ANALOG_LIVE_WAVEFORM_SIZE; + } + } +} + +static int digital_frame_size(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + + switch (devc->model->series) { + case RIGOL_VS5000: + return VS5000_DIGITAL_WAVEFORM_SIZE; + case RIGOL_DS1000: + return DS1000_DIGITAL_WAVEFORM_SIZE; + default: + return 0; + } +} + static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, const struct sr_probe_group *probe_group) { struct dev_context *devc; - unsigned int i; + struct sr_probe *probe; + const char *tmp_str; + uint64_t samplerate; + int analog_channel = -1; + float smallest_diff = 0.0000000001; + int idx = -1; + unsigned i; if (!sdi || !(devc = sdi->priv)) return SR_ERR_ARG; /* If a probe group is specified, it must be a valid one. */ + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; + } + if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); + probe = g_slist_nth_data(probe_group->probes, 0); + if (!probe) return SR_ERR; + if (probe->type == SR_PROBE_ANALOG) { + if (probe->name[2] < '1' || probe->name[2] > '4') + return SR_ERR; + analog_channel = probe->name[2] - '1'; } } switch (id) { case SR_CONF_NUM_TIMEBASE: - *data = g_variant_new_int32(devc->num_timebases); + *data = g_variant_new_int32(devc->model->num_horizontal_divs); break; case SR_CONF_NUM_VDIV: - if (!probe_group) { - sr_err("No probe group specified."); - return SR_ERR_PROBE_GROUP; - } - for (i = 0; i < 2; i++) { - if (probe_group == &devc->analog_groups[i]) { - *data = g_variant_new_int32(devc->num_vdivs); - return SR_OK; - } - } - return SR_ERR_NA; + *data = g_variant_new_int32(NUM_VDIV); case SR_CONF_DATA_SOURCE: if (devc->data_source == DATA_SOURCE_LIVE) *data = g_variant_new_string("Live"); @@ -509,6 +595,64 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, else *data = g_variant_new_string("Segmented"); break; + case SR_CONF_SAMPLERATE: + if (devc->data_source == DATA_SOURCE_LIVE) { + samplerate = analog_frame_size(sdi) / + (devc->timebase * devc->model->num_horizontal_divs); + *data = g_variant_new_uint64(samplerate); + } else { + return SR_ERR_NA; + } + break; + case SR_CONF_TRIGGER_SOURCE: + if (!strcmp(devc->trigger_source, "ACL")) + tmp_str = "AC Line"; + else if (!strcmp(devc->trigger_source, "CHAN1")) + tmp_str = "CH1"; + else if (!strcmp(devc->trigger_source, "CHAN2")) + tmp_str = "CH2"; + else if (!strcmp(devc->trigger_source, "CHAN3")) + tmp_str = "CH3"; + else if (!strcmp(devc->trigger_source, "CHAN4")) + tmp_str = "CH4"; + else + tmp_str = devc->trigger_source; + *data = g_variant_new_string(tmp_str); + break; + case SR_CONF_TIMEBASE: + for (i = 0; i < devc->num_timebases; i++) { + float tb = (float)devc->timebases[i][0] / devc->timebases[i][1]; + float diff = fabs(devc->timebase - tb); + if (diff < smallest_diff) { + smallest_diff = diff; + idx = i; + } + } + if (idx < 0) + return SR_ERR_NA; + *data = g_variant_new("(tt)", devc->timebases[idx][0], + devc->timebases[idx][1]); + break; + case SR_CONF_VDIV: + if (analog_channel < 0) + return SR_ERR_NA; + for (i = 0; i < ARRAY_SIZE(vdivs); i++) { + float vdiv = (float)vdivs[i][0] / vdivs[i][1]; + float diff = fabs(devc->vdiv[analog_channel] - vdiv); + if (diff < smallest_diff) { + smallest_diff = diff; + idx = i; + } + } + if (idx < 0) + return SR_ERR_NA; + *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]); + break; + case SR_CONF_COUPLING: + if (analog_channel < 0) + return SR_ERR_NA; + *data = g_variant_new_string(devc->coupling[analog_channel]); + break; default: return SR_ERR_NA; } @@ -525,6 +669,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, unsigned int i, j; int ret; const char *tmp_str; + char buffer[16]; if (!(devc = sdi->priv)) return SR_ERR_ARG; @@ -533,12 +678,9 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, return SR_ERR_DEV_CLOSED; /* If a probe group is specified, it must be a valid one. */ - if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); - return SR_ERR; - } + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; } ret = SR_OK; @@ -562,14 +704,17 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, /* We have the trigger offset as a percentage of the frame, but * need to express this in seconds. */ t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases; - ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl); + g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl); + ret = set_cfg(sdi, ":TIM:OFFS %s", buffer); break; case SR_CONF_TIMEBASE: g_variant_get(data, "(tt)", &p, &q); for (i = 0; i < devc->num_timebases; i++) { if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) { devc->timebase = (float)p / q; - ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase); + g_ascii_formatd(buffer, sizeof(buffer), "%.9f", + devc->timebase); + ret = set_cfg(sdi, ":TIM:SCAL %s", buffer); break; } } @@ -588,6 +733,10 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, tmp_str = "CHAN1"; else if (!strcmp(devc->trigger_source, "CH2")) tmp_str = "CHAN2"; + else if (!strcmp(devc->trigger_source, "CH3")) + tmp_str = "CHAN3"; + else if (!strcmp(devc->trigger_source, "CH4")) + tmp_str = "CHAN4"; else tmp_str = (char *)devc->trigger_source; ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str); @@ -609,8 +758,10 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, if (vdivs[j][0] != p || vdivs[j][1] != q) continue; devc->vdiv[i] = (float)p / q; - return set_cfg(sdi, ":CHAN%d:SCAL %.3f", i + 1, - devc->vdiv[i]); + g_ascii_formatd(buffer, sizeof(buffer), "%.3f", + devc->vdiv[i]); + return set_cfg(sdi, ":CHAN%d:SCAL %s", i + 1, + buffer); } return SR_ERR_ARG; } @@ -642,7 +793,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, devc->data_source = DATA_SOURCE_LIVE; else if (!strcmp(tmp_str, "Memory")) devc->data_source = DATA_SOURCE_MEMORY; - else if (devc->model->protocol == PROTOCOL_IEEE488_2 + else if (devc->model->series >= RIGOL_DS1000Z && !strcmp(tmp_str, "Segmented")) devc->data_source = DATA_SOURCE_SEGMENTED; else @@ -691,7 +842,6 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, } switch (key) { - break; case SR_CONF_DEVICE_OPTIONS: if (!probe_group) { sr_err("No probe group specified."); @@ -728,7 +878,7 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, return SR_ERR_PROBE_GROUP; } g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY); - for (i = 0; i < devc->num_vdivs; i++) { + for (i = 0; i < NUM_VDIV; i++) { rational[0] = g_variant_new_uint64(devc->vdivs[i][0]); rational[1] = g_variant_new_uint64(devc->vdivs[i][1]); tuple = g_variant_new_tuple(rational, 2); @@ -740,6 +890,8 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, if (!devc) /* Can't know this until we have the exact model. */ return SR_ERR_ARG; + if (devc->num_timebases <= 0) + return SR_ERR_NA; g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY); for (i = 0; i < devc->num_timebases; i++) { rational[0] = g_variant_new_uint64(devc->timebases[i][0]); @@ -778,8 +930,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) struct sr_scpi_dev_inst *scpi; struct dev_context *devc; struct sr_probe *probe; + struct sr_datafeed_packet packet; GSList *l; - char cmd[256]; if (sdi->status != SR_ST_ACTIVE) return SR_ERR_DEV_CLOSED; @@ -787,18 +939,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) scpi = sdi->conn; devc = sdi->priv; - if (devc->data_source == DATA_SOURCE_LIVE) { - if (sr_scpi_send(sdi->conn, ":RUN") != SR_OK) - return SR_ERR; - } else if (devc->data_source == DATA_SOURCE_MEMORY) { - if (devc->model->series != RIGOL_DS2000) { - sr_err("Data source 'Memory' not supported for this device"); - return SR_ERR; - } - } else if (devc->data_source == DATA_SOURCE_SEGMENTED) { - sr_err("Data source 'Segmented' not yet supported"); - return SR_ERR; - } + devc->num_frames = 0; for (l = sdi->probes; l; l = l->next) { probe = l->data; @@ -809,72 +950,92 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) devc->enabled_analog_probes, probe); if (probe->enabled != devc->analog_channels[probe->index]) { /* Enabled channel is currently disabled, or vice versa. */ - sprintf(cmd, ":CHAN%d:DISP %s", probe->index + 1, - probe->enabled ? "ON" : "OFF"); - if (sr_scpi_send(sdi->conn, cmd) != SR_OK) + if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1, + probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; + devc->analog_channels[probe->index] = probe->enabled; } } else if (probe->type == SR_PROBE_LOGIC) { - if (probe->enabled) + if (probe->enabled) { devc->enabled_digital_probes = g_slist_append( devc->enabled_digital_probes, probe); + /* Turn on LA module if currently off. */ + if (!devc->la_enabled) { + if (set_cfg(sdi, ":LA:DISP ON") != SR_OK) + return SR_ERR; + devc->la_enabled = TRUE; + } + } if (probe->enabled != devc->digital_channels[probe->index]) { /* Enabled channel is currently disabled, or vice versa. */ - sprintf(cmd, ":DIG%d:TURN %s", probe->index, - probe->enabled ? "ON" : "OFF"); - if (sr_scpi_send(sdi->conn, cmd) != SR_OK) + if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index, + probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; + devc->digital_channels[probe->index] = probe->enabled; } } } + if (!devc->enabled_analog_probes && !devc->enabled_digital_probes) return SR_ERR; + /* Turn off LA module if on and no digital probes selected. */ + if (devc->la_enabled && !devc->enabled_digital_probes) + if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK) + return SR_ERR; + + if (devc->data_source == DATA_SOURCE_LIVE) { + if (set_cfg(sdi, ":RUN") != SR_OK) + return SR_ERR; + } else if (devc->data_source == DATA_SOURCE_MEMORY) { + if (devc->model->series != RIGOL_DS2000) { + sr_err("Data source 'Memory' not supported for this device"); + return SR_ERR; + } + } else if (devc->data_source == DATA_SOURCE_SEGMENTED) { + sr_err("Data source 'Segmented' not yet supported"); + return SR_ERR; + } + sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi); /* Send header packet to the session bus. */ std_session_send_df_header(cb_data, LOG_PREFIX); - if (devc->model->protocol == PROTOCOL_LEGACY) { - /* Fetch the first frame. */ - if (devc->enabled_analog_probes) { - devc->analog_frame_size = DS1000_ANALOG_LIVE_WAVEFORM_SIZE; - devc->channel_frame = devc->enabled_analog_probes->data; - if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d", - devc->channel_frame->index + 1) != SR_OK) - return SR_ERR; - } else { - devc->channel_frame = devc->enabled_digital_probes->data; - if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK) - return SR_ERR; - } + if (devc->enabled_analog_probes) + devc->channel_entry = devc->enabled_analog_probes; + else + devc->channel_entry = devc->enabled_digital_probes; + + devc->analog_frame_size = analog_frame_size(sdi); + devc->digital_frame_size = digital_frame_size(sdi); - devc->num_frame_bytes = 0; + if (devc->model->series < RIGOL_DS1000Z) { + /* Fetch the first frame. */ + if (rigol_ds_channel_start(sdi) != SR_OK) + return SR_ERR; } else { if (devc->enabled_analog_probes) { - if (devc->data_source == DATA_SOURCE_MEMORY) - { - if (g_slist_length(devc->enabled_analog_probes) == 1) - devc->analog_frame_size = DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C; - else - devc->analog_frame_size = DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C; + if (devc->data_source == DATA_SOURCE_MEMORY) { /* Apparently for the DS2000 the memory * depth can only be set in Running state - * this matches the behaviour of the UI. */ - if (sr_scpi_send(sdi->conn, ":RUN") != SR_OK) + if (set_cfg(sdi, ":RUN") != SR_OK) return SR_ERR; - if (sr_scpi_send(sdi->conn, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK) + if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK) return SR_ERR; - if (sr_scpi_send(sdi->conn, ":STOP") != SR_OK) + if (set_cfg(sdi, ":STOP") != SR_OK) return SR_ERR; - } else - devc->analog_frame_size = DS2000_ANALOG_LIVE_WAVEFORM_SIZE; - devc->channel_frame = devc->enabled_analog_probes->data; + } if (rigol_ds_capture_start(sdi) != SR_OK) return SR_ERR; } } + /* Start of first frame. */ + packet.type = SR_DF_FRAME_BEGIN; + sr_session_send(cb_data, &packet); + return SR_OK; } @@ -882,6 +1043,7 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) { struct dev_context *devc; struct sr_scpi_dev_inst *scpi; + struct sr_datafeed_packet packet; (void)cb_data; @@ -892,6 +1054,10 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) return SR_ERR; } + /* End of last frame. */ + packet.type = SR_DF_END; + sr_session_send(sdi, &packet); + g_slist_free(devc->enabled_analog_probes); g_slist_free(devc->enabled_digital_probes); devc->enabled_analog_probes = NULL;