X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Fopenbench-logic-sniffer%2Fapi.c;h=f738dce49479c594bfd21d781fc99ac0d80706ca;hb=7b0a57fd1c1d1b658864b81df2357849ccc4715c;hp=77082257454e4dac3c059d20341cb94ae8b34750;hpb=de524099823d7a7b9aeae3e87e79c14cfc809fd6;p=libsigrok.git

diff --git a/hardware/openbench-logic-sniffer/api.c b/hardware/openbench-logic-sniffer/api.c
index 77082257..f738dce4 100644
--- a/hardware/openbench-logic-sniffer/api.c
+++ b/hardware/openbench-logic-sniffer/api.c
@@ -34,6 +34,7 @@ static const int32_t hwcaps[] = {
 	SR_CONF_LIMIT_SAMPLES,
 	SR_CONF_EXTERNAL_CLOCK,
 	SR_CONF_PATTERN_MODE,
+	SR_CONF_SWAP,
 	SR_CONF_RLE,
 };
 
@@ -325,6 +326,17 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
 			ret = SR_ERR;
 		}
 		break;
+	case SR_CONF_SWAP:
+		if (g_variant_get_boolean(data)) {
+			sr_info("Enabling channel swapping.");
+			devc->flag_reg |= FLAG_SWAP_PROBES;
+		} else {
+			sr_info("Disabling channel swapping.");
+			devc->flag_reg &= ~FLAG_SWAP_PROBES;
+		}
+		ret = SR_OK;
+		break;
+
 	case SR_CONF_RLE:
 		if (g_variant_get_boolean(data)) {
 			sr_info("Enabling RLE.");