X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Flink-mso19%2Fprotocol.c;h=d94e2b6c1b3d6625042d26f64d93e4f0f7792cb0;hb=c5d6f5cc1c0069a5141c5c76f7e17dd592427138;hp=6f4be15b9cae187c828e8eb8852c7db7545dd74f;hpb=4b719338ccf3add3f872e8cd7549bddf818c4360;p=libsigrok.git diff --git a/hardware/link-mso19/protocol.c b/hardware/link-mso19/protocol.c index 6f4be15b..d94e2b6c 100644 --- a/hardware/link-mso19/protocol.c +++ b/hardware/link-mso19/protocol.c @@ -1,7 +1,9 @@ /* * This file is part of the sigrok project. * - * Copyright (C) 2010-2012 Bert Vermeulen + * Copyright (C) 2011 Daniel Ribeiro + * Copyright (C) 2012 Renato Caldas + * Copyright (C) 2013 Lior Elazary * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,82 +21,135 @@ #include "protocol.h" +/* serial protocol */ +#define mso_trans(a, v) \ + (((v) & 0x3f) | (((v) & 0xc0) << 6) | (((a) & 0xf) << 8) | \ + ((~(v) & 0x20) << 1) | ((~(v) & 0x80) << 7)) + +static const char mso_head[] = { 0x40, 0x4c, 0x44, 0x53, 0x7e }; +static const char mso_foot[] = { 0x7e }; + extern SR_PRIV struct sr_dev_driver link_mso19_driver_info; static struct sr_dev_driver *di = &link_mso19_driver_info; -SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi) +SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial, + uint16_t payload[], int n) +{ + int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot); + char *p, *buf; + + ret = SR_ERR; + + if (serial->fd < 0) + goto ret; + + if (!(buf = g_try_malloc(s))) { + sr_err("Failed to malloc message buffer."); + ret = SR_ERR_MALLOC; + goto ret; + } + + p = buf; + memcpy(p, mso_head, sizeof(mso_head)); + p += sizeof(mso_head); + + for (i = 0; i < n; i++) { + *(uint16_t *) p = g_htons(payload[i]); + p += 2; + } + memcpy(p, mso_foot, sizeof(mso_foot)); + + w = 0; + while (w < s) { + ret = serial_write(serial, buf + w, s - w); + if (ret < 0) { + ret = SR_ERR; + goto free; + } + w += ret; + } + ret = SR_OK; +free: + g_free(buf); +ret: + return ret; +} + +SR_PRIV int mso_configure_trigger(const struct sr_dev_inst *sdi) { struct dev_context *devc = sdi->priv; - uint16_t ops[16]; - uint16_t dso_trigger = mso_calc_raw_from_mv(devc); + uint16_t threshold_value = mso_calc_raw_from_mv(devc); - dso_trigger &= 0x3ff; - if ((!devc->trigger_slope && devc->trigger_chan == 1) || - (devc->trigger_slope && - (devc->trigger_chan == 0 || - devc->trigger_chan == 2 || - devc->trigger_chan == 3))) - dso_trigger |= 0x400; + threshold_value = 0x153C; + uint8_t trigger_config = 0; - switch (devc->trigger_chan) { + if (devc->trigger_slope) + trigger_config |= 0x04; //Trigger on falling edge + + switch (devc->trigger_outsrc) { case 1: - dso_trigger |= 0xe000; + trigger_config |= 0x00; //Trigger pulse output + break; case 2: - dso_trigger |= 0x4000; + trigger_config |= 0x08; //PWM DAC from the pattern generator buffer break; case 3: - dso_trigger |= 0x2000; - break; - case 4: - dso_trigger |= 0xa000; - break; - case 5: - dso_trigger |= 0x8000; - break; - default: - case 0: + trigger_config |= 0x18; //White noise break; } - switch (devc->trigger_outsrc) { + switch (devc->trigger_chan) { + case 0: + trigger_config |= 0x00; //DSO level trigger //b00000000 + break; case 1: - dso_trigger |= 0x800; + trigger_config |= 0x20; //DSO level trigger & width < trigger_width break; case 2: - dso_trigger |= 0x1000; + trigger_config |= 0x40; //DSO level trigger & width >= trigger_width break; case 3: - dso_trigger |= 0x1800; + trigger_config |= 0x60; //LA combination trigger break; - } - ops[0] = mso_trans(5, devc->la_trigger); - ops[1] = mso_trans(6, devc->la_trigger_mask); - ops[2] = mso_trans(3, dso_trigger & 0xff); - ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff); - ops[4] = mso_trans(11, - devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate)); + //Last bit of trigger config reg 4 needs to be 1 for trigger enable, + //otherwise the trigger is not enabled + if (devc->use_trigger) + trigger_config |= 0x80; + + uint16_t ops[18]; + ops[0] = mso_trans(3, threshold_value & 0xff); + //The trigger_config also holds the 2 MSB bits from the threshold value + ops[1] = mso_trans(4, trigger_config | (threshold_value >> 8) & 0x03); + ops[2] = mso_trans(5, devc->la_trigger); + ops[3] = mso_trans(6, devc->la_trigger_mask); + ops[4] = mso_trans(7, devc->trigger_holdoff[0]); + ops[5] = mso_trans(8, devc->trigger_holdoff[1]); + + ops[6] = mso_trans(11, + devc->dso_trigger_width / + SR_HZ_TO_NS(devc->cur_rate)); /* Select the SPI/I2C trigger config bank */ - ops[5] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2))); + ops[7] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2))); /* Configure the SPI/I2C protocol trigger */ - ops[6] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]); - ops[7] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]); - ops[8] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]); - ops[9] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]); - ops[10] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]); - ops[11] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]); - ops[12] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]); - ops[13] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]); - ops[14] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode); + ops[8] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]); + ops[9] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]); + ops[10] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]); + ops[11] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]); + ops[12] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]); + ops[13] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]); + ops[14] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]); + ops[15] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]); + ops[16] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode); /* Select the default config bank */ - ops[15] = mso_trans(REG_CTL2, devc->ctlbase2); + ops[17] = mso_trans(REG_CTL2, devc->ctlbase2); - return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); + return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops)); } -SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi) +SR_PRIV int mso_configure_threshold_level(const struct sr_dev_inst *sdi) { struct dev_context *devc = sdi->priv; @@ -110,7 +165,7 @@ SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi) return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops)); } -SR_PRIV int mso_arm(struct sr_dev_inst *sdi) +SR_PRIV int mso_arm(const struct sr_dev_inst *sdi) { struct dev_context *devc = sdi->priv; uint16_t ops[] = { @@ -135,7 +190,7 @@ SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi) return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops)); } -SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val) +SR_PRIV int mso_dac_out(const struct sr_dev_inst *sdi, uint16_t val) { struct dev_context *devc = sdi->priv; uint16_t ops[] = { @@ -148,35 +203,32 @@ SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val) return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops)); } -SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc) +SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context * devc) { return (uint16_t) (0x200 - - ((devc->dso_trigger_voltage / devc->dso_probe_attn) / - devc->vbit)); + ((devc->dso_trigger_voltage / devc->dso_probe_attn) / + devc->vbit)); } - SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct, - struct dev_context *devc) + struct dev_context *devc) { unsigned int u1, u2, u3, u4, u5, u6; - iProduct = iProduct; - /* FIXME: This code is in the original app, but I think its - * used only for the GUI */ - /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03")) - devc->num_sample_rates = 0x16; - else - devc->num_sample_rates = 0x10; */ - + iProduct = iProduct; + /* FIXME: This code is in the original app, but I think its + * used only for the GUI */ + /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03")) + devc->num_sample_rates = 0x16; + else + devc->num_sample_rates = 0x10; */ /* parse iSerial */ if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u", - &u1, &u2, &u3, &u4, &u5, &u6) != 6) + &u1, &u2, &u3, &u4, &u5, &u6) != 6) return SR_ERR; devc->hwmodel = u4; devc->hwrev = u5; - devc->serial = u6; devc->vbit = u1 / 10000; if (devc->vbit == 0) devc->vbit = 4.19195; @@ -196,59 +248,42 @@ SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct, return SR_OK; } -SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial, - uint16_t payload[], int n) +SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi) { - int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot); - char *p, *buf; - - ret = SR_ERR; + struct dev_context *devc = sdi->priv; + uint16_t ops[2]; - if (serial->fd < 0) - goto ret; + ops[0] = mso_trans(REG_CTL1, (devc->ctlbase1 | BIT_CTL1_RESETADC)); + ops[1] = mso_trans(REG_CTL1, devc->ctlbase1); + devc->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4; - if (!(buf = g_try_malloc(s))) { - sr_err("Failed to malloc message buffer."); - ret = SR_ERR_MALLOC; - goto ret; - } + sr_dbg("Requesting ADC reset."); + return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops)); +} - p = buf; - memcpy(p, mso_head, sizeof(mso_head)); - p += sizeof(mso_head); +SR_PRIV int mso_reset_fsm(struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + uint16_t ops[1]; - for (i = 0; i < n; i++) { - *(uint16_t *) p = htons(payload[i]); - p += 2; - } - memcpy(p, mso_foot, sizeof(mso_foot)); + devc->ctlbase1 |= BIT_CTL1_RESETFSM; + ops[0] = mso_trans(REG_CTL1, devc->ctlbase1); - w = 0; - while (w < s) { - ret = serial_write(serial, buf + w, s - w); - if (ret < 0) { - ret = SR_ERR; - goto free; - } - w += ret; - } - ret = SR_OK; -free: - g_free(buf); -ret: - return ret; + sr_dbg("Requesting ADC reset."); + return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops)); } -SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi) +SR_PRIV int mso_toggle_led(struct sr_dev_inst *sdi, int state) { struct dev_context *devc = sdi->priv; - uint16_t ops[2]; + uint16_t ops[1]; - ops[0] = mso_trans(REG_CTL1, (devc->ctlbase1 | BIT_CTL1_RESETADC)); - ops[1] = mso_trans(REG_CTL1, devc->ctlbase1); - devc->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4; + devc->ctlbase1 &= ~BIT_CTL1_LED; + if (state) + devc->ctlbase1 |= BIT_CTL1_LED; + ops[0] = mso_trans(REG_CTL1, devc->ctlbase1); - sr_dbg("Requesting ADC reset."); + sr_dbg("Requesting LED toggle."); return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops)); } @@ -276,7 +311,7 @@ SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val) return mso_send_control_message(serial, ARRAY_AND_SIZE(ops)); } -SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate) +SR_PRIV int mso_configure_rate(const struct sr_dev_inst *sdi, uint32_t rate) { struct dev_context *devc = sdi->priv; unsigned int i; @@ -291,14 +326,14 @@ SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate) return ret; } } - return ret; -} - - + if (ret != SR_OK) + sr_err("Unsupported rate."); + return ret; +} -SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info) +SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t * info) { uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) }; int ret; @@ -308,9 +343,8 @@ SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info) if (info == NULL || ret != SR_OK) return ret; - - uint8_t buf = 0; - if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */ + uint8_t buf = 0; + if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */ ret = SR_ERR; *info = buf; @@ -320,20 +354,16 @@ SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info) SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data) { - struct sr_datafeed_packet packet; struct sr_datafeed_logic logic; struct sr_dev_inst *sdi; - struct drv_context *drvc; - struct dev_context *devc; GSList *l; - int num_channels, offset, i, j; - unsigned char byte; + int i; - drvc = di->priv; + struct drv_context *drvc = di->priv; /* Find this device's devc struct by its fd. */ - devc = NULL; + struct dev_context *devc = NULL; for (l = drvc->instances; l; l = l->next) { sdi = l->data; devc = sdi->priv; @@ -349,20 +379,22 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data) uint8_t in[1024]; size_t s = serial_read(devc->serial, in, sizeof(in)); + if (s <= 0) return FALSE; - - /* No samples */ - if (devc->trigger_state != MSO_TRIGGER_DATAREADY) { - devc->trigger_state = in[0]; - if (devc->trigger_state == MSO_TRIGGER_DATAREADY) { - mso_read_buffer(sdi); - devc->buffer_n = 0; - } else { - mso_check_trigger(devc->serial, NULL); - } - return FALSE; - } + + /* Check if we triggered, then send a command that we are ready + * to read the data */ + if (devc->trigger_state != MSO_TRIGGER_DATAREADY) { + devc->trigger_state = in[0]; + if (devc->trigger_state == MSO_TRIGGER_DATAREADY) { + mso_read_buffer(sdi); + devc->buffer_n = 0; + } else { + mso_check_trigger(devc->serial, NULL); + } + return TRUE; + } /* the hardware always dumps 1024 samples, 24bits each */ if (devc->buffer_n < 3072) { @@ -370,7 +402,7 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data) devc->buffer_n += s; } if (devc->buffer_n < 3072) - return FALSE; + return TRUE; /* do the conversion */ uint8_t logic_out[1024]; @@ -378,9 +410,9 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data) for (i = 0; i < 1024; i++) { /* FIXME: Need to do conversion to mV */ analog_out[i] = (devc->buffer[i * 3] & 0x3f) | - ((devc->buffer[i * 3 + 1] & 0xf) << 6); + ((devc->buffer[i * 3 + 1] & 0xf) << 6); logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) | - ((devc->buffer[i * 3 + 2] & 0x3f) << 2); + ((devc->buffer[i * 3 + 2] & 0x3f) << 2); } packet.type = SR_DF_LOGIC; @@ -390,16 +422,50 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data) logic.data = logic_out; sr_session_send(cb_data, &packet); - // Dont bother fixing this yet, keep it "old style" - /* - packet.type = SR_DF_ANALOG; - packet.length = 1024; - packet.unitsize = sizeof(double); - packet.payload = analog_out; - sr_session_send(ctx->session_dev_id, &packet); - */ + devc->num_samples += 1024; - packet.type = SR_DF_END; - sr_session_send(devc->session_dev_id, &packet); + if (devc->limit_samples && devc->num_samples >= devc->limit_samples) { + sr_info("Requested number of samples reached."); + sdi->driver->dev_acquisition_stop(sdi, cb_data); + } + return TRUE; +} + +SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc; + struct sr_probe *probe; + GSList *l; + char *tc; + + devc = sdi->priv; + + devc->la_trigger_mask = 0xFF; //the mask for the LA_TRIGGER (bits set to 0 matter, those set to 1 are ignored). + devc->la_trigger = 0x00; //The value of the LA byte that generates a trigger event (in that mode). + devc->dso_trigger_voltage = 3; + devc->dso_probe_attn = 1; + devc->trigger_outsrc = 0; + devc->trigger_chan = 3; //LA combination trigger + devc->use_trigger = FALSE; + + for (l = sdi->probes; l; l = l->next) { + probe = (struct sr_probe *)l->data; + if (probe->enabled == FALSE) + continue; + + int probe_bit = 1 << (probe->index); + if (!(probe->trigger)) + continue; + + devc->use_trigger = TRUE; + //Configure trigger mask and value. + for (tc = probe->trigger; *tc; tc++) { + devc->la_trigger_mask &= ~probe_bit; + if (*tc == '1') + devc->la_trigger |= probe_bit; + } + } + + return SR_OK; }