X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Fasix-sigma%2Fasix-sigma.c;h=bfd69484bf8b944e8db564bc82ccab03cdb33d93;hb=102f12396660e0784134bccce5cc0679db325751;hp=e57373248ec81d565d2ade7f349964956f2aa26f;hpb=e69ad48e084138c72b5cb5a419efed628c0996bc;p=libsigrok.git diff --git a/hardware/asix-sigma/asix-sigma.c b/hardware/asix-sigma/asix-sigma.c index e5737324..bfd69484 100644 --- a/hardware/asix-sigma/asix-sigma.c +++ b/hardware/asix-sigma/asix-sigma.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "libsigrok.h" #include "libsigrok-internal.h" #include "asix-sigma.h" @@ -36,7 +37,6 @@ #define USB_DESCRIPTION "ASIX SIGMA" #define USB_VENDOR_NAME "ASIX" #define USB_MODEL_NAME "SIGMA" -#define TRIGGER_TYPE "rf10" SR_PRIV struct sr_dev_driver asix_sigma_driver_info; static struct sr_dev_driver *di = &asix_sigma_driver_info; @@ -74,10 +74,16 @@ static const char *channel_names[] = { static const int32_t hwcaps[] = { SR_CONF_LOGIC_ANALYZER, SR_CONF_SAMPLERATE, - SR_CONF_TRIGGER_TYPE, + SR_CONF_TRIGGER_MATCH, SR_CONF_CAPTURE_RATIO, SR_CONF_LIMIT_MSEC, - SR_CONF_LIMIT_SAMPLES, +}; + +static const int32_t trigger_matches[] = { + SR_TRIGGER_ZERO, + SR_TRIGGER_ONE, + SR_TRIGGER_RISING, + SR_TRIGGER_FALLING, }; static const char *sigma_firmware_files[] = { @@ -360,7 +366,7 @@ static GSList *scan(GSList *options) sr_info("Found ASIX SIGMA - Serial: %s", serial_txt); - devc->cur_samplerate = 0; + devc->cur_samplerate = samplerates[0]; devc->period_ps = 0; devc->limit_msec = 0; devc->cur_firmware = -1; @@ -683,20 +689,20 @@ static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate) if (samplerate <= SR_MHZ(50)) { ret = upload_firmware(0, devc); devc->num_channels = 16; - } - if (samplerate == SR_MHZ(100)) { + } else if (samplerate == SR_MHZ(100)) { ret = upload_firmware(1, devc); devc->num_channels = 8; - } - else if (samplerate == SR_MHZ(200)) { + } else if (samplerate == SR_MHZ(200)) { ret = upload_firmware(2, devc); devc->num_channels = 4; } - devc->cur_samplerate = samplerate; - devc->period_ps = 1000000000000ULL / samplerate; - devc->samples_per_event = 16 / devc->num_channels; - devc->state.state = SIGMA_IDLE; + if (ret == SR_OK) { + devc->cur_samplerate = samplerate; + devc->period_ps = 1000000000000ULL / samplerate; + devc->samples_per_event = 16 / devc->num_channels; + devc->state.state = SIGMA_IDLE; + } return ret; } @@ -709,76 +715,81 @@ static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate) * The Sigma supports complex triggers using boolean expressions, but this * has not been implemented yet. */ -static int configure_channels(const struct sr_dev_inst *sdi) +static int convert_trigger(const struct sr_dev_inst *sdi) { - struct dev_context *devc = sdi->priv; - const struct sr_channel *ch; - const GSList *l; - int trigger_set = 0; - int channelbit; + struct dev_context *devc; + struct sr_trigger *trigger; + struct sr_trigger_stage *stage; + struct sr_trigger_match *match; + const GSList *l, *m; + int channelbit, trigger_set; + devc = sdi->priv; memset(&devc->trigger, 0, sizeof(struct sigma_trigger)); + if (!(trigger = sr_session_trigger_get(sdi->session))) + return SR_OK; + + trigger_set = 0; + for (l = trigger->stages; l; l = l->next) { + stage = l->data; + for (m = stage->matches; m; m = m->next) { + match = m->data; + if (!match->channel->enabled) + /* Ignore disabled channels with a trigger. */ + continue; + channelbit = 1 << (match->channel->index); + if (devc->cur_samplerate >= SR_MHZ(100)) { + /* Fast trigger support. */ + if (trigger_set) { + sr_err("Only a single pin trigger is " + "supported in 100 and 200MHz mode."); + return SR_ERR; + } + if (match->match == SR_TRIGGER_FALLING) + devc->trigger.fallingmask |= channelbit; + else if (match->match == SR_TRIGGER_RISING) + devc->trigger.risingmask |= channelbit; + else { + sr_err("Only rising/falling trigger is " + "supported in 100 and 200MHz mode."); + return SR_ERR; + } - for (l = sdi->channels; l; l = l->next) { - ch = (struct sr_channel *)l->data; - channelbit = 1 << (ch->index); - - if (!ch->enabled || !ch->trigger) - continue; - - if (devc->cur_samplerate >= SR_MHZ(100)) { - /* Fast trigger support. */ - if (trigger_set) { - sr_err("Only a single pin trigger in 100 and " - "200MHz mode is supported."); - return SR_ERR; - } - if (ch->trigger[0] == 'f') - devc->trigger.fallingmask |= channelbit; - else if (ch->trigger[0] == 'r') - devc->trigger.risingmask |= channelbit; - else { - sr_err("Only rising/falling trigger in 100 " - "and 200MHz mode is supported."); - return SR_ERR; - } - - ++trigger_set; - } else { - /* Simple trigger support (event). */ - if (ch->trigger[0] == '1') { - devc->trigger.simplevalue |= channelbit; - devc->trigger.simplemask |= channelbit; - } - else if (ch->trigger[0] == '0') { - devc->trigger.simplevalue &= ~channelbit; - devc->trigger.simplemask |= channelbit; - } - else if (ch->trigger[0] == 'f') { - devc->trigger.fallingmask |= channelbit; ++trigger_set; - } - else if (ch->trigger[0] == 'r') { - devc->trigger.risingmask |= channelbit; - ++trigger_set; - } - - /* - * Actually, Sigma supports 2 rising/falling triggers, - * but they are ORed and the current trigger syntax - * does not permit ORed triggers. - */ - if (trigger_set > 1) { - sr_err("Only 1 rising/falling trigger " - "is supported."); - return SR_ERR; + } else { + /* Simple trigger support (event). */ + if (match->match == SR_TRIGGER_ONE) { + devc->trigger.simplevalue |= channelbit; + devc->trigger.simplemask |= channelbit; + } + else if (match->match == SR_TRIGGER_ZERO) { + devc->trigger.simplevalue &= ~channelbit; + devc->trigger.simplemask |= channelbit; + } + else if (match->match == SR_TRIGGER_FALLING) { + devc->trigger.fallingmask |= channelbit; + ++trigger_set; + } + else if (match->match == SR_TRIGGER_RISING) { + devc->trigger.risingmask |= channelbit; + ++trigger_set; + } + + /* + * Actually, Sigma supports 2 rising/falling triggers, + * but they are ORed and the current trigger syntax + * does not permit ORed triggers. + */ + if (trigger_set > 1) { + sr_err("Only 1 rising/falling trigger " + "is supported."); + return SR_ERR; + } } } - - if (trigger_set) - devc->use_triggers = 1; } + return SR_OK; } @@ -809,13 +820,19 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, (void)cg; + if (!sdi) + return SR_ERR; + devc = sdi->priv; + switch (id) { case SR_CONF_SAMPLERATE: - if (sdi) { - devc = sdi->priv; - *data = g_variant_new_uint64(devc->cur_samplerate); - } else - return SR_ERR; + *data = g_variant_new_uint64(devc->cur_samplerate); + break; + case SR_CONF_LIMIT_MSEC: + *data = g_variant_new_uint64(devc->limit_msec); + break; + case SR_CONF_CAPTURE_RATIO: + *data = g_variant_new_uint64(devc->capture_ratio); break; default: return SR_ERR_NA; @@ -828,7 +845,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) { struct dev_context *devc; - uint64_t num_samples; + uint64_t tmp; int ret; (void)cg; @@ -838,27 +855,28 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, devc = sdi->priv; + ret = SR_OK; switch (id) { case SR_CONF_SAMPLERATE: ret = set_samplerate(sdi, g_variant_get_uint64(data)); break; case SR_CONF_LIMIT_MSEC: - devc->limit_msec = g_variant_get_uint64(data); - if (devc->limit_msec > 0) - ret = SR_OK; + tmp = g_variant_get_uint64(data); + if (tmp > 0) + devc->limit_msec = g_variant_get_uint64(data); else ret = SR_ERR; break; case SR_CONF_LIMIT_SAMPLES: - num_samples = g_variant_get_uint64(data); - devc->limit_msec = num_samples * 1000 / devc->cur_samplerate; + tmp = g_variant_get_uint64(data); + devc->limit_msec = tmp * 1000 / devc->cur_samplerate; break; case SR_CONF_CAPTURE_RATIO: - devc->capture_ratio = g_variant_get_uint64(data); - if (devc->capture_ratio < 0 || devc->capture_ratio > 100) - ret = SR_ERR; + tmp = g_variant_get_uint64(data); + if (tmp <= 100) + devc->capture_ratio = tmp; else - ret = SR_OK; + ret = SR_ERR; break; default: ret = SR_ERR_NA; @@ -888,8 +906,10 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar); *data = g_variant_builder_end(&gvb); break; - case SR_CONF_TRIGGER_TYPE: - *data = g_variant_new_string(TRIGGER_TYPE); + case SR_CONF_TRIGGER_MATCH: + *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, + trigger_matches, ARRAY_SIZE(trigger_matches), + sizeof(int32_t)); break; default: return SR_ERR_NA; @@ -899,27 +919,29 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, } /* Software trigger to determine exact trigger position. */ -static int get_trigger_offset(uint16_t *samples, uint16_t last_sample, +static int get_trigger_offset(uint8_t *samples, uint16_t last_sample, struct sigma_trigger *t) { int i; + uint16_t sample = 0; for (i = 0; i < 8; ++i) { if (i > 0) - last_sample = samples[i-1]; + last_sample = sample; + sample = samples[2 * i] | (samples[2 * i + 1] << 8); /* Simple triggers. */ - if ((samples[i] & t->simplemask) != t->simplevalue) + if ((sample & t->simplemask) != t->simplevalue) continue; /* Rising edge. */ - if ((last_sample & t->risingmask) != 0 || (samples[i] & - t->risingmask) != t->risingmask) + if (((last_sample & t->risingmask) != 0) || + ((sample & t->risingmask) != t->risingmask)) continue; /* Falling edge. */ if ((last_sample & t->fallingmask) != t->fallingmask || - (samples[i] & t->fallingmask) != 0) + (sample & t->fallingmask) != 0) continue; break; @@ -929,141 +951,160 @@ static int get_trigger_offset(uint16_t *samples, uint16_t last_sample, return i & 0x7; } + /* - * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster. - * Each event is 20ns apart, and can contain multiple samples. - * - * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart. - * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart. - * For 50 MHz and below, events contain one sample for each channel, - * spread 20 ns apart. + * Return the timestamp of "DRAM cluster". */ -static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, - uint16_t *lastsample, int triggerpos, - uint16_t limit_chunk, void *cb_data) +static uint16_t sigma_dram_cluster_ts(struct sigma_dram_cluster *cluster) +{ + return (cluster->timestamp_hi << 8) | cluster->timestamp_lo; +} + +static void sigma_decode_dram_cluster(struct sigma_dram_cluster *dram_cluster, + unsigned int events_in_cluster, + unsigned int triggered, + struct sr_dev_inst *sdi) { - struct sr_dev_inst *sdi = cb_data; struct dev_context *devc = sdi->priv; - uint16_t tsdiff, ts; - uint16_t samples[65536 * devc->samples_per_event]; + struct sigma_state *ss = &devc->state; struct sr_datafeed_packet packet; struct sr_datafeed_logic logic; - int i, j, k, l, numpad, tosend; - size_t n = 0, sent = 0; - int clustersize = EVENTS_PER_CLUSTER * devc->samples_per_event; - uint16_t *event; - uint16_t cur_sample; - int triggerts = -1; - - /* Check if trigger is in this chunk. */ - if (triggerpos != -1) { - if (devc->cur_samplerate <= SR_MHZ(50)) - triggerpos -= EVENTS_PER_CLUSTER - 1; - - if (triggerpos < 0) - triggerpos = 0; - - /* Find in which cluster the trigger occured. */ - triggerts = triggerpos / 7; - } + uint16_t tsdiff, ts; + uint8_t samples[2048]; + unsigned int i; - /* For each ts. */ - for (i = 0; i < 64; ++i) { - ts = *(uint16_t *) &buf[i * 16]; - tsdiff = ts - *lastts; - *lastts = ts; + ts = sigma_dram_cluster_ts(dram_cluster); + tsdiff = ts - ss->lastts; + ss->lastts = ts; - /* Decode partial chunk. */ - if (limit_chunk && ts > limit_chunk) - return SR_OK; + packet.type = SR_DF_LOGIC; + packet.payload = &logic; + logic.unitsize = 2; + logic.data = samples; - /* Pad last sample up to current point. */ - numpad = tsdiff * devc->samples_per_event - clustersize; - if (numpad > 0) { - for (j = 0; j < numpad; ++j) - samples[j] = *lastsample; + /* + * First of all, send Sigrok a copy of the last sample from + * previous cluster as many times as needed to make up for + * the differential characteristics of data we get from the + * Sigma. Sigrok needs one sample of data per period. + * + * One DRAM cluster contains a timestamp and seven samples, + * the units of timestamp are "devc->period_ps" , the first + * sample in the cluster happens at the time of the timestamp + * and the remaining samples happen at timestamp +1...+6 . + */ + for (ts = 0; ts < tsdiff - (EVENTS_PER_CLUSTER - 1); ts++) { + i = ts % 1024; + samples[2 * i + 0] = ss->lastsample & 0xff; + samples[2 * i + 1] = ss->lastsample >> 8; - n = numpad; + /* + * If we have 1024 samples ready or we're at the + * end of submitting the padding samples, submit + * the packet to Sigrok. + */ + if ((i == 1023) || (ts == (tsdiff - EVENTS_PER_CLUSTER))) { + logic.length = (i + 1) * logic.unitsize; + sr_session_send(sdi, &packet); } + } - /* Send samples between previous and this timestamp to sigrok. */ - sent = 0; - while (sent < n) { - tosend = MIN(2048, n - sent); + /* + * Parse the samples in current cluster and prepare them + * to be submitted to Sigrok. + */ + for (i = 0; i < events_in_cluster; i++) { + samples[2 * i + 1] = dram_cluster->samples[i].sample_lo; + samples[2 * i + 0] = dram_cluster->samples[i].sample_hi; + } + + /* Send data up to trigger point (if triggered). */ + int trigger_offset = 0; + if (triggered) { + /* + * Trigger is not always accurate to sample because of + * pipeline delay. However, it always triggers before + * the actual event. We therefore look at the next + * samples to pinpoint the exact position of the trigger. + */ + trigger_offset = get_trigger_offset(samples, + ss->lastsample, &devc->trigger); + if (trigger_offset > 0) { packet.type = SR_DF_LOGIC; - packet.payload = &logic; - logic.length = tosend * sizeof(uint16_t); - logic.unitsize = 2; - logic.data = samples + sent; - sr_session_send(devc->cb_data, &packet); + logic.length = trigger_offset * logic.unitsize; + sr_session_send(sdi, &packet); + events_in_cluster -= trigger_offset; + } - sent += tosend; + /* Only send trigger if explicitly enabled. */ + if (devc->use_triggers) { + packet.type = SR_DF_TRIGGER; + sr_session_send(sdi, &packet); } - n = 0; + } - event = (uint16_t *) &buf[i * 16 + 2]; - cur_sample = 0; + if (events_in_cluster > 0) { + packet.type = SR_DF_LOGIC; + logic.length = events_in_cluster * logic.unitsize; + logic.data = samples + (trigger_offset * logic.unitsize); + sr_session_send(sdi, &packet); + } - /* For each event in cluster. */ - for (j = 0; j < 7; ++j) { + ss->lastsample = + samples[2 * (events_in_cluster - 1) + 0] | + (samples[2 * (events_in_cluster - 1) + 1] << 8); - /* For each sample in event. */ - for (k = 0; k < devc->samples_per_event; ++k) { - cur_sample = 0; +} - /* For each channel. */ - for (l = 0; l < devc->num_channels; ++l) - cur_sample |= (!!(event[j] & (1 << (l * - devc->samples_per_event + k)))) << l; +/* + * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster. + * Each event is 20ns apart, and can contain multiple samples. + * + * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart. + * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart. + * For 50 MHz and below, events contain one sample for each channel, + * spread 20 ns apart. + */ +static int decode_chunk_ts(struct sigma_dram_line *dram_line, + uint16_t events_in_line, + uint32_t trigger_event, + struct sr_dev_inst *sdi) +{ + struct sigma_dram_cluster *dram_cluster; + struct dev_context *devc = sdi->priv; + unsigned int clusters_in_line = + (events_in_line + (EVENTS_PER_CLUSTER - 1)) / EVENTS_PER_CLUSTER; + unsigned int events_in_cluster; + unsigned int i; + uint32_t trigger_cluster = ~0, triggered = 0; - samples[n++] = cur_sample; - } + /* Check if trigger is in this chunk. */ + if (trigger_event < (64 * 7)) { + if (devc->cur_samplerate <= SR_MHZ(50)) { + trigger_event -= MIN(EVENTS_PER_CLUSTER - 1, + trigger_event); } - /* Send data up to trigger point (if triggered). */ - sent = 0; - if (i == triggerts) { - /* - * Trigger is not always accurate to sample because of - * pipeline delay. However, it always triggers before - * the actual event. We therefore look at the next - * samples to pinpoint the exact position of the trigger. - */ - tosend = get_trigger_offset(samples, *lastsample, - &devc->trigger); - - if (tosend > 0) { - packet.type = SR_DF_LOGIC; - packet.payload = &logic; - logic.length = tosend * sizeof(uint16_t); - logic.unitsize = 2; - logic.data = samples; - sr_session_send(devc->cb_data, &packet); - - sent += tosend; - } - - /* Only send trigger if explicitly enabled. */ - if (devc->use_triggers) { - packet.type = SR_DF_TRIGGER; - sr_session_send(devc->cb_data, &packet); - } - } + /* Find in which cluster the trigger occured. */ + trigger_cluster = trigger_event / EVENTS_PER_CLUSTER; + } - /* Send rest of the chunk to sigrok. */ - tosend = n - sent; + /* For each full DRAM cluster. */ + for (i = 0; i < clusters_in_line; i++) { + dram_cluster = &dram_line->cluster[i]; - if (tosend > 0) { - packet.type = SR_DF_LOGIC; - packet.payload = &logic; - logic.length = tosend * sizeof(uint16_t); - logic.unitsize = 2; - logic.data = samples + sent; - sr_session_send(devc->cb_data, &packet); + /* The last cluster might not be full. */ + if ((i == clusters_in_line - 1) && + (events_in_line % EVENTS_PER_CLUSTER)) { + events_in_cluster = events_in_line % EVENTS_PER_CLUSTER; + } else { + events_in_cluster = EVENTS_PER_CLUSTER; } - *lastsample = samples[n - 1]; + triggered = (i == trigger_cluster); + sigma_decode_dram_cluster(dram_cluster, events_in_cluster, + triggered, sdi); } return SR_OK; @@ -1072,9 +1113,8 @@ static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, static int download_capture(struct sr_dev_inst *sdi) { struct dev_context *devc = sdi->priv; - const int chunks_per_read = 32; + const uint32_t chunks_per_read = 32; struct sigma_dram_line *dram_line; - unsigned char *buf; int bufsz; uint32_t stoppos, triggerpos; struct sr_datafeed_packet packet; @@ -1082,15 +1122,13 @@ static int download_capture(struct sr_dev_inst *sdi) uint32_t i; uint32_t dl_lines_total, dl_lines_curr, dl_lines_done; - uint32_t dl_trailing_events; - uint32_t trg_line = ~0; + uint32_t dl_events_in_line = 64 * 7; + uint32_t trg_line = ~0, trg_event = ~0; dram_line = g_try_malloc0(chunks_per_read * sizeof(*dram_line)); if (!dram_line) return FALSE; - buf = (unsigned char *)dram_line; - sr_info("Downloading sample data."); /* Stop acquisition. */ @@ -1104,8 +1142,10 @@ static int download_capture(struct sr_dev_inst *sdi) /* Check if trigger has fired. */ modestatus = sigma_get_register(READ_MODE, devc); - if (modestatus & 0x20) + if (modestatus & 0x20) { trg_line = triggerpos >> 9; + trg_event = triggerpos & 0x1ff; + } /* * Determine how many 1024b "DRAM lines" do we need to read from the @@ -1113,7 +1153,6 @@ static int download_capture(struct sr_dev_inst *sdi) * line can be only partial, containing less than 64 clusters. */ dl_lines_total = (stoppos >> 9) + 1; - dl_trailing_events = stoppos & 0x1ff; dl_lines_done = 0; @@ -1121,31 +1160,30 @@ static int download_capture(struct sr_dev_inst *sdi) /* We can download only up-to 32 DRAM lines in one go! */ dl_lines_curr = MIN(chunks_per_read, dl_lines_total); - bufsz = sigma_read_dram(dl_lines_done, dl_lines_curr, buf, devc); + bufsz = sigma_read_dram(dl_lines_done, dl_lines_curr, + (uint8_t *)dram_line, devc); /* TODO: Check bufsz. For now, just avoid compiler warnings. */ (void)bufsz; /* This is the first DRAM line, so find the initial timestamp. */ if (dl_lines_done == 0) { - devc->state.lastts = RL16(buf) - 1; + devc->state.lastts = + sigma_dram_cluster_ts(&dram_line[0].cluster[0]); devc->state.lastsample = 0; } for (i = 0; i < dl_lines_curr; i++) { - uint32_t dl_limit = 0; - int trigger_line = -1; + uint32_t trigger_event = ~0; /* The last "DRAM line" can be only partially full. */ if (dl_lines_done + i == dl_lines_total - 1) - dl_limit = dl_trailing_events; + dl_events_in_line = stoppos & 0x1ff; /* Test if the trigger happened on this line. */ if (dl_lines_done + i == trg_line) - trigger_line = trg_line; + trigger_event = trg_event; - decode_chunk_ts(buf + (i * CHUNK_SIZE), - &devc->state.lastts, - &devc->state.lastsample, - trigger_line, dl_limit, sdi); + decode_chunk_ts(dram_line + i, dl_events_in_line, + trigger_event, sdi); } dl_lines_done += dl_lines_curr; @@ -1385,8 +1423,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) devc = sdi->priv; - if (configure_channels(sdi) != SR_OK) { - sr_err("Failed to configure channels."); + if (convert_trigger(sdi) != SR_OK) { + sr_err("Failed to configure triggers."); return SR_ERR; } @@ -1471,10 +1509,10 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) devc->cb_data = cb_data; /* Send header packet to the session bus. */ - std_session_send_df_header(cb_data, LOG_PREFIX); + std_session_send_df_header(sdi, LOG_PREFIX); /* Add capture source. */ - sr_source_add(0, G_IO_IN, 10, receive_data, (void *)sdi); + sr_session_source_add(sdi->session, 0, G_IO_IN, 10, receive_data, (void *)sdi); devc->state.state = SIGMA_CAPTURE; @@ -1490,7 +1528,7 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) devc = sdi->priv; devc->state.state = SIGMA_IDLE; - sr_source_remove(0); + sr_session_source_remove(sdi->session, 0); return SR_OK; }