X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Fasix-sigma%2Fasix-sigma.c;h=bc36764edfcd9df5d753157df03a28fc3bbe1a24;hb=54ac5277c5e462f1778300b9bc3fdd4709ecb2dc;hp=f1b1c471b08c1419314108746d7e53d3c1f33cbf;hpb=28a35d8ab35483b6d50e5b8404542cc11875fa5d;p=libsigrok.git diff --git a/hardware/asix-sigma/asix-sigma.c b/hardware/asix-sigma/asix-sigma.c index f1b1c471..bc36764e 100644 --- a/hardware/asix-sigma/asix-sigma.c +++ b/hardware/asix-sigma/asix-sigma.c @@ -1,13 +1,9 @@ /* * This file is part of the sigrok project. * - * ASIX Sigma Logic Analyzer Driver - * - * Copyright (C) 2010 - * - * Håvard Espeland , - * Martin Stensgård - * Carl Henrik Lunde + * Copyright (C) 2010 Håvard Espeland , + * Copyright (C) 2010 Martin Stensgård + * Copyright (C) 2010 Carl Henrik Lunde * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,11 +19,17 @@ * along with this program. If not, see . */ +/* + * ASIX Sigma Logic Analyzer Driver + */ + +#include "config.h" +#include +#include #include #include #include - -#include "sigrok.h" +#include #include "asix-sigma.h" #define USB_VENDOR 0xa600 @@ -36,65 +38,97 @@ #define USB_VENDOR_NAME "ASIX" #define USB_MODEL_NAME "SIGMA" #define USB_MODEL_VERSION "" -#define FIRMWARE FIRMWARE_DIR "/asix-sigma-200.firmware" +#define TRIGGER_TYPES "rf10" static GSList *device_instances = NULL; -// XXX These should be per device -static struct ftdi_context ftdic; -static uint64_t cur_samplerate = MHZ(200); -static uint32_t limit_msec = 0; -static struct timeval start_tv; - static uint64_t supported_samplerates[] = { + KHZ(200), + KHZ(250), + KHZ(500), + MHZ(1), + MHZ(5), + MHZ(10), + MHZ(25), + MHZ(50), + MHZ(100), MHZ(200), 0, }; -static struct samplerates samplerates = { - MHZ(200), +static struct sr_samplerates samplerates = { + KHZ(200), MHZ(200), 0, supported_samplerates, }; static int capabilities[] = { - HWCAP_LOGIC_ANALYZER, - HWCAP_SAMPLERATE, + SR_HWCAP_LOGIC_ANALYZER, + SR_HWCAP_SAMPLERATE, + SR_HWCAP_CAPTURE_RATIO, + SR_HWCAP_PROBECONFIG, - /* These are really implemented in the driver, not the hardware. */ - HWCAP_LIMIT_MSEC, + SR_HWCAP_LIMIT_MSEC, 0, }; -static int sigma_read(void* buf, size_t size) +/* Force the FPGA to reboot. */ +static uint8_t suicide[] = { + 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84, +}; + +/* Prepare to upload firmware (FPGA specific). */ +static uint8_t init[] = { + 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, +}; + +/* Initialize the logic analyzer mode. */ +static uint8_t logic_mode_start[] = { + 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40, + 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38, +}; + +static const char *firmware_files[] = { + "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */ + "asix-sigma-100.fw", /* 100 MHz */ + "asix-sigma-200.fw", /* 200 MHz */ + "asix-sigma-50sync.fw", /* Synchronous clock from pin */ + "asix-sigma-phasor.fw", /* Frequency counter */ +}; + +static void hw_stop_acquisition(int device_index, gpointer session_device_id); + +static int sigma_read(void *buf, size_t size, struct sigma *sigma) { int ret; - ret = ftdi_read_data(&ftdic, (unsigned char*) buf, size); + + ret = ftdi_read_data(&sigma->ftdic, (unsigned char *)buf, size); if (ret < 0) { g_warning("ftdi_read_data failed: %s", - ftdi_get_error_string(&ftdic)); + ftdi_get_error_string(&sigma->ftdic)); } return ret; } -static int sigma_write(void* buf, size_t size) +static int sigma_write(void *buf, size_t size, struct sigma *sigma) { int ret; - ret = ftdi_write_data(&ftdic, (unsigned char*) buf, size); + + ret = ftdi_write_data(&sigma->ftdic, (unsigned char *)buf, size); if (ret < 0) { g_warning("ftdi_write_data failed: %s", - ftdi_get_error_string(&ftdic)); - } - else if ((size_t) ret != size) { + ftdi_get_error_string(&sigma->ftdic)); + } else if ((size_t) ret != size) { g_warning("ftdi_write_data did not complete write\n"); } return ret; } -static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len) +static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len, + struct sigma *sigma) { size_t i; uint8_t buf[len + 2]; @@ -103,36 +137,38 @@ static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len) buf[idx++] = REG_ADDR_LOW | (reg & 0xf); buf[idx++] = REG_ADDR_HIGH | (reg >> 4); - for (i=0; i> 4); } - return sigma_write(buf, idx); + return sigma_write(buf, idx, sigma); } -static int sigma_set_register(uint8_t reg, uint8_t value) +static int sigma_set_register(uint8_t reg, uint8_t value, struct sigma *sigma) { - return sigma_write_register(reg, &value, 1); + return sigma_write_register(reg, &value, 1, sigma); } -static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len) +static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len, + struct sigma *sigma) { uint8_t buf[3]; + buf[0] = REG_ADDR_LOW | (reg & 0xf); buf[1] = REG_ADDR_HIGH | (reg >> 4); - buf[2] = REG_READ_ADDR; - sigma_write(buf, sizeof(buf)); + sigma_write(buf, sizeof(buf), sigma); - return sigma_read(data, len); + return sigma_read(data, len, sigma); } -static uint8_t sigma_get_register(uint8_t reg) +static uint8_t sigma_get_register(uint8_t reg, struct sigma *sigma) { uint8_t value; - if (1 != sigma_read_register(reg, &value, 1)) { + + if (1 != sigma_read_register(reg, &value, 1, sigma)) { g_warning("Sigma_get_register: 1 byte expected"); return 0; } @@ -140,7 +176,8 @@ static uint8_t sigma_get_register(uint8_t reg) return value; } -static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos) +static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos, + struct sigma *sigma) { uint8_t buf[] = { REG_ADDR_LOW | READ_TRIGGER_POS_LOW, @@ -152,56 +189,121 @@ static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos) REG_READ_ADDR | NEXT_REG, REG_READ_ADDR | NEXT_REG, }; - uint8_t result[6]; - sigma_write(buf, sizeof(buf)); + sigma_write(buf, sizeof(buf), sigma); - sigma_read(result, sizeof(result)); + sigma_read(result, sizeof(result), sigma); *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16); *stoppos = result[3] | (result[4] << 8) | (result[5] << 16); + /* Not really sure why this must be done, but according to spec. */ + if ((--*stoppos & 0x1ff) == 0x1ff) + stoppos -= 64; + + if ((*--triggerpos & 0x1ff) == 0x1ff) + triggerpos -= 64; + return 1; } -static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data) +static int sigma_read_dram(uint16_t startchunk, size_t numchunks, + uint8_t *data, struct sigma *sigma) { size_t i; uint8_t buf[4096]; int idx = 0; - /* Send the startchunk. Index start with 1 */ + /* Send the startchunk. Index start with 1. */ buf[0] = startchunk >> 8; buf[1] = startchunk & 0xff; - sigma_write_register(WRITE_MEMROW, buf, 2); + sigma_write_register(WRITE_MEMROW, buf, 2, sigma); - /* Read the DRAM */ + /* Read the DRAM. */ buf[idx++] = REG_DRAM_BLOCK; buf[idx++] = REG_DRAM_WAIT_ACK; for (i = 0; i < numchunks; ++i) { - /* Alternate bit to copy from dram to cache */ - if (i != numchunks-1) - buf[idx++] = REG_DRAM_BLOCK | (((i+1) % 2) << 4); + /* Alternate bit to copy from DRAM to cache. */ + if (i != (numchunks - 1)) + buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4); buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4); - if (i != numchunks-1) + if (i != (numchunks - 1)) buf[idx++] = REG_DRAM_WAIT_ACK; } - sigma_write(buf, idx); + sigma_write(buf, idx, sigma); - return sigma_read(data, numchunks * CHUNK_SIZE); + return sigma_read(data, numchunks * CHUNK_SIZE, sigma); } +/* Upload trigger look-up tables to Sigma. */ +static int sigma_write_trigger_lut(struct triggerlut *lut, struct sigma *sigma) +{ + int i; + uint8_t tmp[2]; + uint16_t bit; + + /* Transpose the table and send to Sigma. */ + for (i = 0; i < 16; ++i) { + bit = 1 << i; + + tmp[0] = tmp[1] = 0; + + if (lut->m2d[0] & bit) + tmp[0] |= 0x01; + if (lut->m2d[1] & bit) + tmp[0] |= 0x02; + if (lut->m2d[2] & bit) + tmp[0] |= 0x04; + if (lut->m2d[3] & bit) + tmp[0] |= 0x08; + + if (lut->m3 & bit) + tmp[0] |= 0x10; + if (lut->m3s & bit) + tmp[0] |= 0x20; + if (lut->m4 & bit) + tmp[0] |= 0x40; + + if (lut->m0d[0] & bit) + tmp[1] |= 0x01; + if (lut->m0d[1] & bit) + tmp[1] |= 0x02; + if (lut->m0d[2] & bit) + tmp[1] |= 0x04; + if (lut->m0d[3] & bit) + tmp[1] |= 0x08; + + if (lut->m1d[0] & bit) + tmp[1] |= 0x10; + if (lut->m1d[1] & bit) + tmp[1] |= 0x20; + if (lut->m1d[2] & bit) + tmp[1] |= 0x40; + if (lut->m1d[3] & bit) + tmp[1] |= 0x80; + + sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp), + sigma); + sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, sigma); + } + + /* Send the parameters */ + sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params, + sizeof(lut->params), sigma); + + return SR_OK; +} -/* Generate the bitbang stream for programming the FPGA */ +/* Generate the bitbang stream for programming the FPGA. */ static int bin2bitbang(const char *filename, - unsigned char **buf, size_t* buf_size) + unsigned char **buf, size_t *buf_size) { - FILE *f = fopen(filename, "r"); + FILE *f; long file_size; unsigned long offset = 0; unsigned char *p; @@ -209,10 +311,12 @@ static int bin2bitbang(const char *filename, uLongf csize, fwsize; const int buffer_size = 65536; size_t i; - int c, ret; + int c, ret, bit, v; + uint32_t imm = 0x3f6df2ab; + f = g_fopen(filename, "rb"); if (!f) { - g_warning("fopen(\"%s\", \"r\")", filename); + g_warning("g_fopen(\"%s\", \"rb\")", filename); return -1; } @@ -226,7 +330,6 @@ static int bin2bitbang(const char *filename, fseek(f, 0, SEEK_SET); - compressed_buf = g_malloc(file_size); firmware = g_malloc(buffer_size); @@ -235,7 +338,6 @@ static int bin2bitbang(const char *filename, return -1; } - uint32_t imm = 0x3f6df2ab; csize = 0; while ((c = getc(f)) != EOF) { imm = (imm + 0xa853753) % 177 + (imm * 0x8034052); @@ -256,7 +358,7 @@ static int bin2bitbang(const char *filename, *buf_size = fwsize * 2 * 8; - *buf = p = (unsigned char*) g_malloc(*buf_size); + *buf = p = (unsigned char *)g_malloc(*buf_size); if (!p) { g_warning("Error allocating buffers"); @@ -264,9 +366,8 @@ static int bin2bitbang(const char *filename, } for (i = 0; i < fwsize; ++i) { - int bit; for (bit = 7; bit >= 0; --bit) { - int v = firmware[i] & 1 << bit ? 0x40 : 0x00; + v = firmware[i] & 1 << bit ? 0x40 : 0x00; p[offset++] = v | 0x01; p[offset++] = v; } @@ -277,8 +378,8 @@ static int bin2bitbang(const char *filename, if (offset != *buf_size) { g_free(*buf); g_warning("Error reading firmware %s " - "offset=%ld, file_size=%ld, buf_size=%zd\n", - filename, offset, file_size, *buf_size); + "offset=%ld, file_size=%ld, buf_size=%zd\n", + filename, offset, file_size, *buf_size); return -1; } @@ -286,206 +387,361 @@ static int bin2bitbang(const char *filename, return 0; } -static int hw_init(char *deviceinfo) +static int hw_init(const char *deviceinfo) { - struct sigrok_device_instance *sdi; + struct sr_device_instance *sdi; + struct sigma *sigma = g_malloc(sizeof(struct sigma)); deviceinfo = deviceinfo; - ftdi_init(&ftdic); - - /* Look for SIGMAs */ - if (ftdi_usb_open_desc(&ftdic, USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL) < 0) + if (!sigma) return 0; - /* Register SIGMA device */ - sdi = sigrok_device_instance_new(0, ST_INITIALIZING, + ftdi_init(&sigma->ftdic); + + /* Look for SIGMAs. */ + if (ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT, + USB_DESCRIPTION, NULL) < 0) + goto free; + + sigma->cur_samplerate = 0; + sigma->limit_msec = 0; + sigma->cur_firmware = -1; + sigma->num_probes = 0; + sigma->samples_per_event = 0; + sigma->capture_ratio = 50; + sigma->use_triggers = 0; + + /* Register SIGMA device. */ + sdi = sr_device_instance_new(0, SR_ST_INITIALIZING, USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION); if (!sdi) - return 0; + goto free; + + sdi->priv = sigma; device_instances = g_slist_append(device_instances, sdi); - /* We will open the device again when we need it */ - ftdi_usb_close(&ftdic); + /* We will open the device again when we need it. */ + ftdi_usb_close(&sigma->ftdic); return 1; +free: + free(sigma); + return 0; } - -static int hw_opendev(int device_index) +static int upload_firmware(int firmware_idx, struct sigma *sigma) { int ret; unsigned char *buf; unsigned char pins; size_t buf_size; - struct sigrok_device_instance *sdi; unsigned char result[32]; + char firmware_path[128]; - /* Make sure it's an ASIX SIGMA */ - if ((ret = ftdi_usb_open_desc(&ftdic, + /* Make sure it's an ASIX SIGMA. */ + if ((ret = ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { - g_warning("ftdi_usb_open failed: %s", - ftdi_get_error_string(&ftdic)); - + ftdi_get_error_string(&sigma->ftdic)); return 0; } - if ((ret = ftdi_set_bitmode(&ftdic, 0xdf, BITMODE_BITBANG)) < 0) { + if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0xdf, BITMODE_BITBANG)) < 0) { g_warning("ftdi_set_bitmode failed: %s", - ftdi_get_error_string(&ftdic)); - + ftdi_get_error_string(&sigma->ftdic)); return 0; } - /* Four times the speed of sigmalogan - Works well */ - if ((ret = ftdi_set_baudrate(&ftdic, 750000)) < 0) { + /* Four times the speed of sigmalogan - Works well. */ + if ((ret = ftdi_set_baudrate(&sigma->ftdic, 750000)) < 0) { g_warning("ftdi_set_baudrate failed: %s", - ftdi_get_error_string(&ftdic)); - + ftdi_get_error_string(&sigma->ftdic)); return 0; } - /* Force the FPGA to reboot */ - unsigned char suicide[] = { - 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84, - }; - - sigma_write(suicide, sizeof(suicide)); - sigma_write(suicide, sizeof(suicide)); - sigma_write(suicide, sizeof(suicide)); - sigma_write(suicide, sizeof(suicide)); - - /* Prepare to upload firmware (FPGA specific) */ - unsigned char init[] = { - 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 - }; + /* Force the FPGA to reboot. */ + sigma_write(suicide, sizeof(suicide), sigma); + sigma_write(suicide, sizeof(suicide), sigma); + sigma_write(suicide, sizeof(suicide), sigma); + sigma_write(suicide, sizeof(suicide), sigma); - sigma_write(init, sizeof(init)); + /* Prepare to upload firmware (FPGA specific). */ + sigma_write(init, sizeof(init), sigma); - ftdi_usb_purge_buffers(&ftdic); + ftdi_usb_purge_buffers(&sigma->ftdic); - /* Wait until the FPGA asserts INIT_B */ + /* Wait until the FPGA asserts INIT_B. */ while (1) { - ret = sigma_read(result, 1); + ret = sigma_read(result, 1, sigma); if (result[0] & 0x20) break; } - /* Prepare firmware */ - if (-1 == bin2bitbang(FIRMWARE, &buf, &buf_size)) { - g_warning("An error occured while reading the firmware: %s", - FIRMWARE); + /* Prepare firmware. */ + snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR, + firmware_files[firmware_idx]); - return SIGROK_ERR; + if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) { + g_warning("An error occured while reading the firmware: %s", + firmware_path); + return SR_ERR; } - /* Upload firmare */ - sigma_write(buf, buf_size); + /* Upload firmare. */ + sigma_write(buf, buf_size, sigma); g_free(buf); - if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) { + if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0x00, BITMODE_RESET)) < 0) { g_warning("ftdi_set_bitmode failed: %s", - ftdi_get_error_string(&ftdic)); - - return SIGROK_ERR; + ftdi_get_error_string(&sigma->ftdic)); + return SR_ERR; } - ftdi_usb_purge_buffers(&ftdic); + ftdi_usb_purge_buffers(&sigma->ftdic); - /* Discard garbage */ - while (1 == sigma_read(&pins, 1)) + /* Discard garbage. */ + while (1 == sigma_read(&pins, 1, sigma)) ; - /* Initialize the logic analyzer mode */ - unsigned char logic_mode_start[] = { - 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40, - 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38 - }; - - sigma_write(logic_mode_start, sizeof(logic_mode_start)); + /* Initialize the logic analyzer mode. */ + sigma_write(logic_mode_start, sizeof(logic_mode_start), sigma); - /* Expect a 3 byte reply */ - ret = sigma_read(result, 3); + /* Expect a 3 byte reply. */ + ret = sigma_read(result, 3, sigma); if (ret != 3 || result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) { + g_warning("Configuration failed. Invalid reply received."); + return SR_ERR; + } + + sigma->cur_firmware = firmware_idx; + + return SR_OK; +} + +static int hw_opendev(int device_index) +{ + struct sr_device_instance *sdi; + struct sigma *sigma; + int ret; + + if (!(sdi = sr_get_device_instance(device_instances, device_index))) + return SR_ERR; + + sigma = sdi->priv; + + /* Make sure it's an ASIX SIGMA. */ + if ((ret = ftdi_usb_open_desc(&sigma->ftdic, + USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { + + g_warning("ftdi_usb_open failed: %s", + ftdi_get_error_string(&sigma->ftdic)); - g_warning("Sigma configuration failed. Invalid reply received."); - return SIGROK_ERR; + return 0; } - /* Works like a charm */ + sdi->status = SR_ST_ACTIVE; + + return SR_OK; +} + +static int set_samplerate(struct sr_device_instance *sdi, + uint64_t samplerate) +{ + int i, ret; + struct sigma *sigma = sdi->priv; + + for (i = 0; supported_samplerates[i]; i++) { + if (supported_samplerates[i] == samplerate) + break; + } + if (supported_samplerates[i] == 0) + return SR_ERR_SAMPLERATE; - if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) - return SIGROK_ERR; + if (samplerate <= MHZ(50)) { + ret = upload_firmware(0, sigma); + sigma->num_probes = 16; + } + if (samplerate == MHZ(100)) { + ret = upload_firmware(1, sigma); + sigma->num_probes = 8; + } + else if (samplerate == MHZ(200)) { + ret = upload_firmware(2, sigma); + sigma->num_probes = 4; + } - sdi->status = ST_ACTIVE; + sigma->cur_samplerate = samplerate; + sigma->samples_per_event = 16 / sigma->num_probes; + sigma->state.state = SIGMA_IDLE; g_message("Firmware uploaded"); - return SIGROK_OK; + return ret; } +/* + * In 100 and 200 MHz mode, only a single pin rising/falling can be + * set as trigger. In other modes, two rising/falling triggers can be set, + * in addition to value/mask trigger for any number of probes. + * + * The Sigma supports complex triggers using boolean expressions, but this + * has not been implemented yet. + */ +static int configure_probes(struct sr_device_instance *sdi, GSList *probes) +{ + struct sigma *sigma = sdi->priv; + struct sr_probe *probe; + GSList *l; + int trigger_set = 0; + int probebit; + + memset(&sigma->trigger, 0, sizeof(struct sigma_trigger)); + + for (l = probes; l; l = l->next) { + probe = (struct sr_probe *)l->data; + probebit = 1 << (probe->index - 1); + + if (!probe->enabled || !probe->trigger) + continue; + + if (sigma->cur_samplerate >= MHZ(100)) { + /* Fast trigger support. */ + if (trigger_set) { + g_warning("Asix Sigma only supports a single " + "pin trigger in 100 and 200 " + "MHz mode."); + return SR_ERR; + } + if (probe->trigger[0] == 'f') + sigma->trigger.fallingmask |= probebit; + else if (probe->trigger[0] == 'r') + sigma->trigger.risingmask |= probebit; + else { + g_warning("Asix Sigma only supports " + "rising/falling trigger in 100 " + "and 200 MHz mode."); + return SR_ERR; + } + + ++trigger_set; + } else { + /* Simple trigger support (event). */ + if (probe->trigger[0] == '1') { + sigma->trigger.simplevalue |= probebit; + sigma->trigger.simplemask |= probebit; + } + else if (probe->trigger[0] == '0') { + sigma->trigger.simplevalue &= ~probebit; + sigma->trigger.simplemask |= probebit; + } + else if (probe->trigger[0] == 'f') { + sigma->trigger.fallingmask |= probebit; + ++trigger_set; + } + else if (probe->trigger[0] == 'r') { + sigma->trigger.risingmask |= probebit; + ++trigger_set; + } + + /* + * Actually, Sigma supports 2 rising/falling triggers, + * but they are ORed and the current trigger syntax + * does not permit ORed triggers. + */ + if (trigger_set > 1) { + g_warning("Asix Sigma only supports 1 rising/" + "falling triggers."); + return SR_ERR; + } + } + + if (trigger_set) + sigma->use_triggers = 1; + } + + return SR_OK; +} static void hw_closedev(int device_index) { - device_index = device_index; + struct sr_device_instance *sdi; + struct sigma *sigma; - ftdi_usb_close(&ftdic); -} + if ((sdi = sr_get_device_instance(device_instances, device_index))) + { + sigma = sdi->priv; + if (sdi->status == SR_ST_ACTIVE) + ftdi_usb_close(&sigma->ftdic); + sdi->status = SR_ST_INACTIVE; + } +} static void hw_cleanup(void) { + GSList *l; + struct sr_device_instance *sdi; + + /* Properly close all devices. */ + for (l = device_instances; l; l = l->next) { + sdi = l->data; + if (sdi->priv != NULL) + free(sdi->priv); + sr_device_instance_free(sdi); + } + g_slist_free(device_instances); + device_instances = NULL; } - static void *hw_get_device_info(int device_index, int device_info_id) { - struct sigrok_device_instance *sdi; + struct sr_device_instance *sdi; + struct sigma *sigma; void *info = NULL; - if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) { + if (!(sdi = sr_get_device_instance(device_instances, device_index))) { fprintf(stderr, "It's NULL.\n"); return NULL; } + sigma = sdi->priv; + switch (device_info_id) { - case DI_INSTANCE: + case SR_DI_INSTANCE: info = sdi; break; - case DI_NUM_PROBES: - info = GINT_TO_POINTER(4); + case SR_DI_NUM_PROBES: + info = GINT_TO_POINTER(16); break; - case DI_SAMPLERATES: + case SR_DI_SAMPLERATES: info = &samplerates; break; - case DI_TRIGGER_TYPES: - info = 0;//TRIGGER_TYPES; + case SR_DI_TRIGGER_TYPES: + info = (char *)TRIGGER_TYPES; break; - case DI_CUR_SAMPLERATE: - info = &cur_samplerate; + case SR_DI_CUR_SAMPLERATE: + info = &sigma->cur_samplerate; break; } return info; } - static int hw_get_status(int device_index) { - struct sigrok_device_instance *sdi; + struct sr_device_instance *sdi; - sdi = get_sigrok_device_instance(device_instances, device_index); + sdi = sr_get_device_instance(device_instances, device_index); if (sdi) return sdi->status; else - return ST_NOT_FOUND; + return SR_ST_NOT_FOUND; } - static int *hw_get_capabilities(void) { return capabilities; @@ -493,246 +749,614 @@ static int *hw_get_capabilities(void) static int hw_set_configuration(int device_index, int capability, void *value) { - struct sigrok_device_instance *sdi; + struct sr_device_instance *sdi; + struct sigma *sigma; int ret; - uint64_t *tmp_u64; - - if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) - return SIGROK_ERR; - - if (capability == HWCAP_SAMPLERATE) { - tmp_u64 = (uint64_t*) value; - /* Only 200 MHz implemented */ - ret = SIGROK_OK; - } else if (capability == HWCAP_PROBECONFIG) { - ret = SIGROK_OK; - } else if (capability == HWCAP_LIMIT_MSEC) { - limit_msec = strtoull(value, NULL, 10); - ret = SIGROK_OK; + + if (!(sdi = sr_get_device_instance(device_instances, device_index))) + return SR_ERR; + + sigma = sdi->priv; + + if (capability == SR_HWCAP_SAMPLERATE) { + ret = set_samplerate(sdi, *(uint64_t*) value); + } else if (capability == SR_HWCAP_PROBECONFIG) { + ret = configure_probes(sdi, value); + } else if (capability == SR_HWCAP_LIMIT_MSEC) { + sigma->limit_msec = *(uint64_t*) value; + if (sigma->limit_msec > 0) + ret = SR_OK; + else + ret = SR_ERR; + } else if (capability == SR_HWCAP_CAPTURE_RATIO) { + sigma->capture_ratio = *(uint64_t*) value; + if (sigma->capture_ratio < 0 || sigma->capture_ratio > 100) + ret = SR_ERR; + else + ret = SR_OK; } else { - ret = SIGROK_ERR; + ret = SR_ERR; } return ret; } - -/* - Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster. - Each event is 20ns apart, and can contain multiple samples. - For 200 MHz, an event contains 4 samples for each channel, spread 5 ns apart - */ -static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, - uint8_t *lastsample, void *user_data) +/* Software trigger to determine exact trigger position. */ +static int get_trigger_offset(uint16_t *samples, uint16_t last_sample, + struct sigma_trigger *t) { - const int samples_per_event = 4; - uint16_t tsdiff; - uint16_t ts; + int i; + + for (i = 0; i < 8; ++i) { + if (i > 0) + last_sample = samples[i-1]; - uint8_t samples[65536 * samples_per_event]; + /* Simple triggers. */ + if ((samples[i] & t->simplemask) != t->simplevalue) + continue; - struct datafeed_packet packet; + /* Rising edge. */ + if ((last_sample & t->risingmask) != 0 || (samples[i] & + t->risingmask) != t->risingmask) + continue; - int i, j, k; - size_t n = 0; + /* Falling edge. */ + if ((last_sample & t->fallingmask) != t->fallingmask || + (samples[i] & t->fallingmask) != 0) + continue; + + break; + } - int clustersize = EVENTS_PER_CLUSTER * samples_per_event; /* 4 for 200 MHz */ + /* If we did not match, return original trigger pos. */ + return i & 0x7; +} - /* For each ts */ +/* + * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster. + * Each event is 20ns apart, and can contain multiple samples. + * + * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart. + * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart. + * For 50 MHz and below, events contain one sample for each channel, + * spread 20 ns apart. + */ +static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, + uint16_t *lastsample, int triggerpos, + uint16_t limit_chunk, void *user_data) +{ + struct sr_device_instance *sdi = user_data; + struct sigma *sigma = sdi->priv; + uint16_t tsdiff, ts; + uint16_t samples[65536 * sigma->samples_per_event]; + struct sr_datafeed_packet packet; + int i, j, k, l, numpad, tosend; + size_t n = 0, sent = 0; + int clustersize = EVENTS_PER_CLUSTER * sigma->samples_per_event; + uint16_t *event; + uint16_t cur_sample; + int triggerts = -1; + + /* Check if trigger is in this chunk. */ + if (triggerpos != -1) { + if (sigma->cur_samplerate <= MHZ(50)) + triggerpos -= EVENTS_PER_CLUSTER - 1; + + if (triggerpos < 0) + triggerpos = 0; + + /* Find in which cluster the trigger occured. */ + triggerts = triggerpos / 7; + } + + /* For each ts. */ for (i = 0; i < 64; ++i) { - ts = *(uint16_t*) &buf[i*16]; + ts = *(uint16_t *) &buf[i * 16]; tsdiff = ts - *lastts; *lastts = ts; - /* Pad last sample up to current point */ - int numpad = tsdiff * samples_per_event - clustersize; + /* Decode partial chunk. */ + if (limit_chunk && ts > limit_chunk) + return SR_OK; + + /* Pad last sample up to current point. */ + numpad = tsdiff * sigma->samples_per_event - clustersize; if (numpad > 0) { - memset(samples, *lastsample, - tsdiff*samples_per_event - clustersize); - n = tsdiff*samples_per_event - clustersize; + for (j = 0; j < numpad; ++j) + samples[j] = *lastsample; + + n = numpad; } - uint16_t *event = (uint16_t*) &buf[i*16+2]; + /* Send samples between previous and this timestamp to sigrok. */ + sent = 0; + while (sent < n) { + tosend = MIN(2048, n - sent); + + packet.type = SR_DF_LOGIC; + packet.length = tosend * sizeof(uint16_t); + packet.unitsize = 2; + packet.payload = samples + sent; + sr_session_bus(sigma->session_id, &packet); - /* For each sample in cluster */ + sent += tosend; + } + n = 0; + + event = (uint16_t *) &buf[i * 16 + 2]; + cur_sample = 0; + + /* For each event in cluster. */ for (j = 0; j < 7; ++j) { - for (k = 0; k < samples_per_event; ++k) { - /* Extract samples from bytestream. - Samples are packed together in a short */ - samples[n++] = - ((!!(event[j] & (1 << (k+0x0)))) << 0) | - ((!!(event[j] & (1 << (k+0x4)))) << 1) | - ((!!(event[j] & (1 << (k+0x8)))) << 2) | - ((!!(event[j] & (1 << (k+0xc)))) << 3); + + /* For each sample in event. */ + for (k = 0; k < sigma->samples_per_event; ++k) { + cur_sample = 0; + + /* For each probe. */ + for (l = 0; l < sigma->num_probes; ++l) + cur_sample |= (!!(event[j] & (1 << (l * + sigma->samples_per_event + + k)))) + << l; + + samples[n++] = cur_sample; } } - *lastsample = samples[n-1]; + /* Send data up to trigger point (if triggered). */ + sent = 0; + if (i == triggerts) { + /* + * Trigger is not always accurate to sample because of + * pipeline delay. However, it always triggers before + * the actual event. We therefore look at the next + * samples to pinpoint the exact position of the trigger. + */ + tosend = get_trigger_offset(samples, *lastsample, + &sigma->trigger); + + if (tosend > 0) { + packet.type = SR_DF_LOGIC; + packet.length = tosend * sizeof(uint16_t); + packet.unitsize = 2; + packet.payload = samples; + sr_session_bus(sigma->session_id, &packet); + + sent += tosend; + } - /* Send to sigrok */ - size_t sent = 0; - while (sent < n) { - int tosend = MIN(4096, n-sent); + /* Only send trigger if explicitly enabled. */ + if (sigma->use_triggers) { + packet.type = SR_DF_TRIGGER; + packet.length = 0; + packet.payload = 0; + sr_session_bus(sigma->session_id, &packet); + } + } - packet.type = DF_LOGIC8; - packet.length = tosend; - packet.payload = samples+sent; - session_bus(user_data, &packet); + /* Send rest of the chunk to sigrok. */ + tosend = n - sent; - sent += tosend; + if (tosend > 0) { + packet.type = SR_DF_LOGIC; + packet.length = tosend * sizeof(uint16_t); + packet.unitsize = 2; + packet.payload = samples + sent; + sr_session_bus(sigma->session_id, &packet); } + + *lastsample = samples[n - 1]; } - return 0; + return SR_OK; } static int receive_data(int fd, int revents, void *user_data) { - struct datafeed_packet packet; - + struct sr_device_instance *sdi = user_data; + struct sigma *sigma = sdi->priv; + struct sr_datafeed_packet packet; const int chunks_per_read = 32; unsigned char buf[chunks_per_read * CHUNK_SIZE]; - int bufsz; - - uint32_t triggerpos, stoppos; - int numchunks; + int bufsz, numchunks, i, newchunks; + uint64_t running_msec; struct timeval tv; - uint32_t running_msec; - - uint16_t lastts = 0; - uint8_t lastsample = 0; - int curchunk, i; fd = fd; revents = revents; - /* Get the current position */ - sigma_read_pos(&stoppos, &triggerpos); - numchunks = stoppos / 512; + numchunks = (sigma->state.stoppos + 511) / 512; + + if (sigma->state.state == SIGMA_IDLE) + return FALSE; + + if (sigma->state.state == SIGMA_CAPTURE) { + + /* Check if the timer has expired, or memory is full. */ + gettimeofday(&tv, 0); + running_msec = (tv.tv_sec - sigma->start_tv.tv_sec) * 1000 + + (tv.tv_usec - sigma->start_tv.tv_usec) / 1000; - /* Check if the has expired, or memory is full */ - gettimeofday(&tv, 0); - running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 + - (tv.tv_usec - start_tv.tv_usec) / 1000; + if (running_msec < sigma->limit_msec && numchunks < 32767) + return FALSE; + + hw_stop_acquisition(sdi->index, user_data); - if (running_msec < limit_msec && numchunks < 32767) return FALSE; - /* Stop Acqusition */ - sigma_set_register(WRITE_MODE, 0x11); + } else if (sigma->state.state == SIGMA_DOWNLOAD) { + if (sigma->state.chunks_downloaded >= numchunks) { + /* End of samples. */ + packet.type = SR_DF_END; + packet.length = 0; + sr_session_bus(sigma->session_id, &packet); - /* Set SDRAM Read Enable */ - sigma_set_register(WRITE_MODE, 0x02); + sigma->state.state = SIGMA_IDLE; - /* Get the current position */ - sigma_read_pos(&stoppos, &triggerpos); + return TRUE; + } - /* Download sample data */ - for (curchunk = 0; curchunk < numchunks;) { - int newchunks = MIN(chunks_per_read, numchunks - curchunk); + newchunks = MIN(chunks_per_read, + numchunks - sigma->state.chunks_downloaded); g_message("Downloading sample data: %.0f %%", - 100.0 * curchunk / numchunks); + 100.0 * sigma->state.chunks_downloaded / numchunks); - bufsz = sigma_read_dram(curchunk, newchunks, buf); + bufsz = sigma_read_dram(sigma->state.chunks_downloaded, + newchunks, buf, sigma); - /* Find first ts */ - if (curchunk == 0) { - lastts = *(uint16_t*) buf - 1; + /* Find first ts. */ + if (sigma->state.chunks_downloaded == 0) { + sigma->state.lastts = *(uint16_t *) buf - 1; + sigma->state.lastsample = 0; } - /* Decode chunks and send them to sigrok */ + /* Decode chunks and send them to sigrok. */ for (i = 0; i < newchunks; ++i) { - decode_chunk_ts(buf + (i * CHUNK_SIZE), - &lastts, &lastsample, user_data); + int limit_chunk = 0; + + /* The last chunk may potentially be only in part. */ + if (sigma->state.chunks_downloaded == numchunks - 1) + { + /* Find the last valid timestamp */ + limit_chunk = sigma->state.stoppos % 512 + sigma->state.lastts; + } + + if (sigma->state.chunks_downloaded + i == sigma->state.triggerchunk) + decode_chunk_ts(buf + (i * CHUNK_SIZE), + &sigma->state.lastts, + &sigma->state.lastsample, + sigma->state.triggerpos & 0x1ff, + limit_chunk, user_data); + else + decode_chunk_ts(buf + (i * CHUNK_SIZE), + &sigma->state.lastts, + &sigma->state.lastsample, + -1, limit_chunk, user_data); + + ++sigma->state.chunks_downloaded; } + } + + return TRUE; +} + +/* Build a LUT entry used by the trigger functions. */ +static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry) +{ + int i, j, k, bit; + + /* For each quad probe. */ + for (i = 0; i < 4; ++i) { + entry[i] = 0xffff; - curchunk += newchunks; + /* For each bit in LUT. */ + for (j = 0; j < 16; ++j) + + /* For each probe in quad. */ + for (k = 0; k < 4; ++k) { + bit = 1 << (i * 4 + k); + + /* Set bit in entry */ + if ((mask & bit) && + ((!(value & bit)) != + (!(j & (1 << k))))) + entry[i] &= ~(1 << j); + } } +} - /* End of data */ - packet.type = DF_END; - packet.length = 0; - session_bus(user_data, &packet); +/* Add a logical function to LUT mask. */ +static void add_trigger_function(enum triggerop oper, enum triggerfunc func, + int index, int neg, uint16_t *mask) +{ + int i, j; + int x[2][2], tmp, a, b, aset, bset, rset; - return TRUE; + memset(x, 0, 4 * sizeof(int)); + + /* Trigger detect condition. */ + switch (oper) { + case OP_LEVEL: + x[0][1] = 1; + x[1][1] = 1; + break; + case OP_NOT: + x[0][0] = 1; + x[1][0] = 1; + break; + case OP_RISE: + x[0][1] = 1; + break; + case OP_FALL: + x[1][0] = 1; + break; + case OP_RISEFALL: + x[0][1] = 1; + x[1][0] = 1; + break; + case OP_NOTRISE: + x[1][1] = 1; + x[0][0] = 1; + x[1][0] = 1; + break; + case OP_NOTFALL: + x[1][1] = 1; + x[0][0] = 1; + x[0][1] = 1; + break; + case OP_NOTRISEFALL: + x[1][1] = 1; + x[0][0] = 1; + break; + } + + /* Transpose if neg is set. */ + if (neg) { + for (i = 0; i < 2; ++i) + for (j = 0; j < 2; ++j) { + tmp = x[i][j]; + x[i][j] = x[1-i][1-j]; + x[1-i][1-j] = tmp; + } + } + + /* Update mask with function. */ + for (i = 0; i < 16; ++i) { + a = (i >> (2 * index + 0)) & 1; + b = (i >> (2 * index + 1)) & 1; + + aset = (*mask >> i) & 1; + bset = x[b][a]; + + if (func == FUNC_AND || func == FUNC_NAND) + rset = aset & bset; + else if (func == FUNC_OR || func == FUNC_NOR) + rset = aset | bset; + else if (func == FUNC_XOR || func == FUNC_NXOR) + rset = aset ^ bset; + + if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR) + rset = !rset; + + *mask &= ~(1 << i); + + if (rset) + *mask |= 1 << i; + } +} + +/* + * Build trigger LUTs used by 50 MHz and lower sample rates for supporting + * simple pin change and state triggers. Only two transitions (rise/fall) can be + * set at any time, but a full mask and value can be set (0/1). + */ +static int build_basic_trigger(struct triggerlut *lut, struct sigma *sigma) +{ + int i,j; + uint16_t masks[2] = { 0, 0 }; + + memset(lut, 0, sizeof(struct triggerlut)); + + /* Contant for simple triggers. */ + lut->m4 = 0xa000; + + /* Value/mask trigger support. */ + build_lut_entry(sigma->trigger.simplevalue, sigma->trigger.simplemask, + lut->m2d); + + /* Rise/fall trigger support. */ + for (i = 0, j = 0; i < 16; ++i) { + if (sigma->trigger.risingmask & (1 << i) || + sigma->trigger.fallingmask & (1 << i)) + masks[j++] = 1 << i; + } + + build_lut_entry(masks[0], masks[0], lut->m0d); + build_lut_entry(masks[1], masks[1], lut->m1d); + + /* Add glue logic */ + if (masks[0] || masks[1]) { + /* Transition trigger. */ + if (masks[0] & sigma->trigger.risingmask) + add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3); + if (masks[0] & sigma->trigger.fallingmask) + add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3); + if (masks[1] & sigma->trigger.risingmask) + add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3); + if (masks[1] & sigma->trigger.fallingmask) + add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3); + } else { + /* Only value/mask trigger. */ + lut->m3 = 0xffff; + } + + /* Triggertype: event. */ + lut->params.selres = 3; + + return SR_OK; } static int hw_start_acquisition(int device_index, gpointer session_device_id) { - struct sigrok_device_instance *sdi; - struct datafeed_packet packet; - struct datafeed_header header; + struct sr_device_instance *sdi; + struct sigma *sigma; + struct sr_datafeed_packet packet; + struct sr_datafeed_header header; + struct clockselect_50 clockselect; + int frac; + uint8_t triggerselect; + struct triggerinout triggerinout_conf; + struct triggerlut lut; + int triggerpin; session_device_id = session_device_id; - if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) - return SIGROK_ERR; + if (!(sdi = sr_get_device_instance(device_instances, device_index))) + return SR_ERR; - device_index = device_index; + sigma = sdi->priv; - /* Setup trigger (by trigger-in) */ - sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20); + /* If the samplerate has not been set, default to 200 KHz. */ + if (sigma->cur_firmware == -1) + set_samplerate(sdi, KHZ(200)); - /* More trigger setup */ - uint8_t trigger_option[2] = { 0x38, 0x00 }; - sigma_write_register(WRITE_TRIGGER_OPTION, - trigger_option, sizeof(trigger_option)); + /* Enter trigger programming mode. */ + sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, sigma); - /* Trigger normal (falling edge) */ - sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08); + /* 100 and 200 MHz mode. */ + if (sigma->cur_samplerate >= MHZ(100)) { + sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, sigma); - /* Enable pins (200 MHz, 4 pins) */ - sigma_set_register(WRITE_CLOCK_SELECT, 0xf0); + /* Find which pin to trigger on from mask. */ + for (triggerpin = 0; triggerpin < 8; ++triggerpin) + if ((sigma->trigger.risingmask | sigma->trigger.fallingmask) & + (1 << triggerpin)) + break; - /* Setup maximum post trigger time */ - sigma_set_register(WRITE_POST_TRIGGER, 0xff); + /* Set trigger pin and light LED on trigger. */ + triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7); - /* Start Acqusition (Software trigger start) */ - gettimeofday(&start_tv, 0); - sigma_set_register(WRITE_MODE, 0x0d); + /* Default rising edge. */ + if (sigma->trigger.fallingmask) + triggerselect |= 1 << 3; + + /* All other modes. */ + } else if (sigma->cur_samplerate <= MHZ(50)) { + build_basic_trigger(&lut, sigma); + + sigma_write_trigger_lut(&lut, sigma); + + triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); + } + + /* Setup trigger in and out pins to default values. */ + memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); + triggerinout_conf.trgout_bytrigger = 1; + triggerinout_conf.trgout_enable = 1; + + sigma_write_register(WRITE_TRIGGER_OPTION, + (uint8_t *) &triggerinout_conf, + sizeof(struct triggerinout), sigma); + + /* Go back to normal mode. */ + sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, sigma); + + /* Set clock select register. */ + if (sigma->cur_samplerate == MHZ(200)) + /* Enable 4 probes. */ + sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, sigma); + else if (sigma->cur_samplerate == MHZ(100)) + /* Enable 8 probes. */ + sigma_set_register(WRITE_CLOCK_SELECT, 0x00, sigma); + else { + /* + * 50 MHz mode (or fraction thereof). Any fraction down to + * 50 MHz / 256 can be used, but is not supported by sigrok API. + */ + frac = MHZ(50) / sigma->cur_samplerate - 1; + + clockselect.async = 0; + clockselect.fraction = frac; + clockselect.disabled_probes = 0; + + sigma_write_register(WRITE_CLOCK_SELECT, + (uint8_t *) &clockselect, + sizeof(clockselect), sigma); + } + /* Setup maximum post trigger time. */ + sigma_set_register(WRITE_POST_TRIGGER, + (sigma->capture_ratio * 255) / 100, sigma); - /* Add capture source */ - source_add(0, G_IO_IN, 10, receive_data, session_device_id); + /* Start acqusition. */ + gettimeofday(&sigma->start_tv, 0); + sigma_set_register(WRITE_MODE, 0x0d, sigma); - receive_data(0, 1, session_device_id); + sigma->session_id = session_device_id; /* Send header packet to the session bus. */ - packet.type = DF_HEADER; - packet.length = sizeof(struct datafeed_header); + packet.type = SR_DF_HEADER; + packet.length = sizeof(struct sr_datafeed_header); packet.payload = &header; header.feed_version = 1; gettimeofday(&header.starttime, NULL); - header.samplerate = cur_samplerate; - header.protocol_id = PROTO_RAW; - header.num_probes = 4; - session_bus(session_device_id, &packet); + header.samplerate = sigma->cur_samplerate; + header.protocol_id = SR_PROTO_RAW; + header.num_logic_probes = sigma->num_probes; + header.num_analog_probes = 0; + sr_session_bus(session_device_id, &packet); - return SIGROK_OK; -} + /* Add capture source. */ + sr_source_add(0, G_IO_IN, 10, receive_data, sdi); + sigma->state.state = SIGMA_CAPTURE; + + return SR_OK; +} static void hw_stop_acquisition(int device_index, gpointer session_device_id) { - device_index = device_index; + struct sr_device_instance *sdi; + struct sigma *sigma; + uint8_t modestatus; + + if (!(sdi = sr_get_device_instance(device_instances, device_index))) + return; + + sigma = sdi->priv; + session_device_id = session_device_id; - /* Stop Acqusition */ - sigma_set_register(WRITE_MODE, 0x11); + /* Stop acquisition. */ + sigma_set_register(WRITE_MODE, 0x11, sigma); - // XXX Set some state to indicate that data should be sent to sigrok - // Now, we just wait for timeout -} + /* Set SDRAM Read Enable. */ + sigma_set_register(WRITE_MODE, 0x02, sigma); + + /* Get the current position. */ + sigma_read_pos(&sigma->state.stoppos, &sigma->state.triggerpos, sigma); + /* Check if trigger has fired. */ + modestatus = sigma_get_register(READ_MODE, sigma); + if (modestatus & 0x20) { + sigma->state.triggerchunk = sigma->state.triggerpos / 512; + } else + sigma->state.triggerchunk = -1; -struct device_plugin asix_sigma_plugin_info = { + sigma->state.chunks_downloaded = 0; + + sigma->state.state = SIGMA_DOWNLOAD; +} + +struct sr_device_plugin asix_sigma_plugin_info = { "asix-sigma", + "ASIX SIGMA", 1, hw_init, hw_cleanup, - hw_opendev, hw_closedev, hw_get_device_info, @@ -740,7 +1364,5 @@ struct device_plugin asix_sigma_plugin_info = { hw_get_capabilities, hw_set_configuration, hw_start_acquisition, - hw_stop_acquisition + hw_stop_acquisition, }; - -// vim:noexpandtab:ts=8 sts=8 sw=8