X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Fasix-sigma%2Fasix-sigma.c;h=1152f443c32b835bf4d09202ee5852fdacfaa870;hb=11fc8d9d938c2e254c62a40f569a964db79a489e;hp=ce3d8433eec73353a55ca9b9cce69d9de0ce2667;hpb=e8397563a219d07179aa273d30396c3c21fb91ba;p=libsigrok.git diff --git a/hardware/asix-sigma/asix-sigma.c b/hardware/asix-sigma/asix-sigma.c index ce3d8433..1152f443 100644 --- a/hardware/asix-sigma/asix-sigma.c +++ b/hardware/asix-sigma/asix-sigma.c @@ -35,17 +35,30 @@ #define USB_VENDOR_NAME "ASIX" #define USB_MODEL_NAME "SIGMA" #define USB_MODEL_VERSION "" +#define TRIGGER_TYPES "rf10" static GSList *device_instances = NULL; // XXX These should be per device static struct ftdi_context ftdic; -static uint64_t cur_samplerate = MHZ(200); +static uint64_t cur_samplerate = 0; static uint32_t limit_msec = 0; static struct timeval start_tv; static int cur_firmware = -1; +static int num_probes = 0; +static int samples_per_event = 0; +static int capture_ratio = 50; + +static struct sigma_trigger trigger; static uint64_t supported_samplerates[] = { + KHZ(200), + KHZ(250), + KHZ(500), + MHZ(1), + MHZ(5), + MHZ(10), + MHZ(25), MHZ(50), MHZ(100), MHZ(200), @@ -53,7 +66,7 @@ static uint64_t supported_samplerates[] = { }; static struct samplerates samplerates = { - MHZ(50), + KHZ(200), MHZ(200), 0, supported_samplerates, @@ -62,8 +75,9 @@ static struct samplerates samplerates = { static int capabilities[] = { HWCAP_LOGIC_ANALYZER, HWCAP_SAMPLERATE, + HWCAP_CAPTURE_RATIO, + HWCAP_PROBECONFIG, - /* These are really implemented in the driver, not the hardware. */ HWCAP_LIMIT_MSEC, 0, }; @@ -84,16 +98,15 @@ static uint8_t logic_mode_start[] = { 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38, }; -static const char *firmware_files[] = -{ - "asix-sigma-50.firmware", /* Supports fractions (8 bits) */ - "asix-sigma-100.firmware", /* 100 MHz */ - "asix-sigma-200.firmware", /* 200 MHz */ - "asix-sigma-50sync.firmware", /* Asynchronous sampling */ - "asix-sigma-phasor.firmware", /* Frequency counter */ +static const char *firmware_files[] = { + "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */ + "asix-sigma-100.fw", /* 100 MHz */ + "asix-sigma-200.fw", /* 200 MHz */ + "asix-sigma-50sync.fw", /* Synchronous clock from pin */ + "asix-sigma-phasor.fw", /* Frequency counter */ }; -static int sigma_read(void* buf, size_t size) +static int sigma_read(void *buf, size_t size) { int ret; @@ -189,6 +202,13 @@ static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos) *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16); *stoppos = result[3] | (result[4] << 8) | (result[5] << 16); + /* Not really sure why this must be done, but according to spec. */ + if ((--*stoppos & 0x1ff) == 0x1ff) + stoppos -= 64; + + if ((*--triggerpos & 0x1ff) == 0x1ff) + triggerpos -= 64; + return 1; } @@ -223,6 +243,64 @@ static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data) return sigma_read(data, numchunks * CHUNK_SIZE); } +/* Upload trigger look-up tables to Sigma */ +static int sigma_write_trigger_lut(struct triggerlut *lut) +{ + int i; + uint8_t tmp[2]; + uint16_t bit; + + /* Transpose the table and send to Sigma. */ + for (i = 0; i < 16; ++i) { + bit = 1 << i; + + tmp[0] = tmp[1] = 0; + + if (lut->m2d[0] & bit) + tmp[0] |= 0x01; + if (lut->m2d[1] & bit) + tmp[0] |= 0x02; + if (lut->m2d[2] & bit) + tmp[0] |= 0x04; + if (lut->m2d[3] & bit) + tmp[0] |= 0x08; + + if (lut->m3 & bit) + tmp[0] |= 0x10; + if (lut->m3s & bit) + tmp[0] |= 0x20; + if (lut->m4 & bit) + tmp[0] |= 0x40; + + if (lut->m0d[0] & bit) + tmp[1] |= 0x01; + if (lut->m0d[1] & bit) + tmp[1] |= 0x02; + if (lut->m0d[2] & bit) + tmp[1] |= 0x04; + if (lut->m0d[3] & bit) + tmp[1] |= 0x08; + + if (lut->m1d[0] & bit) + tmp[1] |= 0x10; + if (lut->m1d[1] & bit) + tmp[1] |= 0x20; + if (lut->m1d[2] & bit) + tmp[1] |= 0x40; + if (lut->m1d[3] & bit) + tmp[1] |= 0x80; + + sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp)); + sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i); + } + + /* Send the parameters */ + sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params, + sizeof(lut->params)); + + return SIGROK_OK; +} + /* Generate the bitbang stream for programming the FPGA. */ static int bin2bitbang(const char *filename, unsigned char **buf, size_t *buf_size) @@ -386,7 +464,7 @@ static int upload_firmware(int firmware_idx) break; } - /* Prepare firmware */ + /* Prepare firmware. */ snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR, firmware_files[firmware_idx]); @@ -402,7 +480,7 @@ static int upload_firmware(int firmware_idx) g_free(buf); if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) { - g_warning("ftdi_set_bitmode failed: %s", + g_warning("ftdi_set_bitmode failed: %s", ftdi_get_error_string(&ftdic)); return SIGROK_ERR; } @@ -434,7 +512,7 @@ static int hw_opendev(int device_index) struct sigrok_device_instance *sdi; int ret; - /* Make sure it's an ASIX SIGMA */ + /* Make sure it's an ASIX SIGMA. */ if ((ret = ftdi_usb_open_desc(&ftdic, USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { @@ -467,20 +545,98 @@ static int set_samplerate(struct sigrok_device_instance *sdi, uint64_t samplerat if (samplerate <= MHZ(50)) { ret = upload_firmware(0); - // XXX: Setup divider + num_probes = 16; } - if (samplerate == MHZ(100)) + if (samplerate == MHZ(100)) { ret = upload_firmware(1); - else if (samplerate == MHZ(200)) + num_probes = 8; + } + else if (samplerate == MHZ(200)) { ret = upload_firmware(2); + num_probes = 4; + } cur_samplerate = samplerate; + samples_per_event = 16 / num_probes; g_message("Firmware uploaded"); return ret; } +/* + * In 100 and 200 MHz mode, only a single pin rising/falling can be + * set as trigger. In other modes, two rising/falling triggers can be set, + * in addition to value/mask trigger for any number of probes. + * + * The Sigma supports complex triggers using boolean expressions, but this + * has not been implemented yet. + */ +static int configure_probes(GSList *probes) +{ + struct probe *probe; + GSList *l; + int trigger_set = 0; + + memset(&trigger, 0, sizeof(struct sigma_trigger)); + + for (l = probes; l; l = l->next) { + probe = (struct probe *)l->data; + + if (!probe->enabled || !probe->trigger) + continue; + + if (cur_samplerate >= MHZ(100)) { + /* Fast trigger support. */ + if (trigger_set) { + g_warning("Asix Sigma only supports a single pin trigger " + "in 100 and 200 MHz mode."); + return SIGROK_ERR; + } + if (probe->trigger[0] == 'f') + trigger.fast_fall = 1; + else if (probe->trigger[0] == 'r') + trigger.fast_fall = 0; + else { + g_warning("Asix Sigma only supports " + "rising/falling trigger in 100 " + "and 200 MHz mode."); + return SIGROK_ERR; + } + + trigger.fast_pin = probe->index - 1; + + ++trigger_set; + } else { + /* Simple trigger support (event). */ + if (probe->trigger[0] == '1') { + trigger.simplevalue |= 1 << (probe->index - 1); + trigger.simplemask |= 1 << (probe->index - 1); + } + else if (probe->trigger[0] == '0') { + trigger.simplevalue |= 0 << (probe->index - 1); + trigger.simplemask |= 1 << (probe->index - 1); + } + else if (probe->trigger[0] == 'f') { + trigger.fallingmask |= 1 << (probe->index - 1); + ++trigger_set; + } + else if (probe->trigger[0] == 'r') { + trigger.risingmask |= 1 << (probe->index - 1); + ++trigger_set; + } + + if (trigger_set > 2) { + g_warning("Asix Sigma only supports 2 rising/" + "falling triggers."); + return SIGROK_ERR; + } + } + } + + return SIGROK_OK; +} + static void hw_closedev(int device_index) { device_index = device_index; @@ -507,13 +663,13 @@ static void *hw_get_device_info(int device_index, int device_info_id) info = sdi; break; case DI_NUM_PROBES: - info = GINT_TO_POINTER(4); + info = GINT_TO_POINTER(16); break; case DI_SAMPLERATES: info = &samplerates; break; case DI_TRIGGER_TYPES: - info = 0; //TRIGGER_TYPES; + info = (char *)TRIGGER_TYPES; break; case DI_CUR_SAMPLERATE: info = &cur_samplerate; @@ -550,10 +706,15 @@ static int hw_set_configuration(int device_index, int capability, void *value) if (capability == HWCAP_SAMPLERATE) { ret = set_samplerate(sdi, *(uint64_t*) value); } else if (capability == HWCAP_PROBECONFIG) { - ret = SIGROK_OK; + ret = configure_probes(value); } else if (capability == HWCAP_LIMIT_MSEC) { limit_msec = strtoull(value, NULL, 10); ret = SIGROK_OK; + } else if (capability == HWCAP_CAPTURE_RATIO) { + capture_ratio = strtoull(value, NULL, 10); + ret = SIGROK_OK; + } else if (capability == HWCAP_PROBECONFIG) { + ret = configure_probes((GSList *) value); } else { ret = SIGROK_ERR; } @@ -564,22 +725,40 @@ static int hw_set_configuration(int device_index, int capability, void *value) /* * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster. * Each event is 20ns apart, and can contain multiple samples. - * For 200 MHz, an event contains 4 samples for each channel, - * spread 5 ns apart. + * + * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart. + * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart. + * For 50 MHz and below, events contain one sample for each channel, + * spread 20 ns apart. */ static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, - uint8_t *lastsample, void *user_data) + uint16_t *lastsample, int triggerpos, void *user_data) { - const int samples_per_event = 4; uint16_t tsdiff, ts; - uint8_t samples[65536 * samples_per_event]; + uint16_t samples[65536 * samples_per_event]; struct datafeed_packet packet; - int i, j, k, numpad, tosend; + int i, j, k, l, numpad, tosend; size_t n = 0, sent = 0; - int clustersize = EVENTS_PER_CLUSTER * samples_per_event; /* 4 for 200 MHz */ + int clustersize = EVENTS_PER_CLUSTER * samples_per_event; uint16_t *event; + uint16_t cur_sample; + int triggerts = -1; + int triggeroff = 0; + + if (triggerpos != -1) { + if (cur_samplerate <= MHZ(50)) + triggerpos -= EVENTS_PER_CLUSTER; + else + triggeroff = 3; - /* For each ts */ + if (triggerpos < 0) + triggerpos = 0; + + /* Find in which cluster the trigger occured. */ + triggerts = triggerpos / 7; + } + + /* For each ts. */ for (i = 0; i < 64; ++i) { ts = *(uint16_t *) &buf[i * 16]; tsdiff = ts - *lastts; @@ -588,45 +767,84 @@ static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, /* Pad last sample up to current point. */ numpad = tsdiff * samples_per_event - clustersize; if (numpad > 0) { - memset(samples, *lastsample, - tsdiff * samples_per_event - clustersize); - n = tsdiff * samples_per_event - clustersize; + for (j = 0; j < numpad; ++j) + samples[j] = *lastsample; + + n = numpad; } + /* Send samples between previous and this timestamp to sigrok. */ + sent = 0; + while (sent < n) { + tosend = MIN(2048, n - sent); + + packet.type = DF_LOGIC16; + packet.length = tosend * sizeof(uint16_t); + packet.payload = samples + sent; + session_bus(user_data, &packet); + + sent += tosend; + } + n = 0; + event = (uint16_t *) &buf[i * 16 + 2]; + cur_sample = 0; - /* For each sample in cluster. */ + /* For each event in cluster. */ for (j = 0; j < 7; ++j) { + + /* For each sample in event. */ for (k = 0; k < samples_per_event; ++k) { - /* - * Extract samples from bytestream. - * Samples are packed together in a short. - */ - samples[n++] = - ((!!(event[j] & (1 << (k + 0x0)))) << 0) | - ((!!(event[j] & (1 << (k + 0x4)))) << 1) | - ((!!(event[j] & (1 << (k + 0x8)))) << 2) | - ((!!(event[j] & (1 << (k + 0xc)))) << 3); + cur_sample = 0; + + /* For each probe. */ + for (l = 0; l < num_probes; ++l) + cur_sample |= (!!(event[j] & (1 << (l * + samples_per_event + k)))) + << l; + + samples[n++] = cur_sample; } } - *lastsample = samples[n - 1]; - - /* Send to sigrok. */ + /* Send data up to trigger point (if triggered). */ sent = 0; - while (sent < n) { - tosend = MIN(4096, n - sent); + if (i == triggerts) { + /* + * Trigger is presumptively only accurate to event, i.e. + * for 100 and 200 MHz, where multiple samples are coded + * in a single event, the trigger does not match the + * exact sample. + */ + tosend = (triggerpos % 7) - triggeroff; + + if (tosend > 0) { + packet.type = DF_LOGIC16; + packet.length = tosend * sizeof(uint16_t); + packet.payload = samples; + session_bus(user_data, &packet); + + sent += tosend; + } - packet.type = DF_LOGIC8; - packet.length = tosend; - packet.payload = samples + sent; + packet.type = DF_TRIGGER; + packet.length = 0; + packet.payload = 0; session_bus(user_data, &packet); - - sent += tosend; } + + /* Send rest of the chunk to sigrok. */ + tosend = n - sent; + + packet.type = DF_LOGIC16; + packet.length = tosend * sizeof(uint16_t); + packet.payload = samples + sent; + session_bus(user_data, &packet); + + *lastsample = samples[n - 1]; } - return 0; + return SIGROK_OK; } static int receive_data(int fd, int revents, void *user_data) @@ -638,7 +856,9 @@ static int receive_data(int fd, int revents, void *user_data) uint32_t triggerpos, stoppos, running_msec; struct timeval tv; uint16_t lastts = 0; - uint8_t lastsample = 0; + uint16_t lastsample = 0; + uint8_t modestatus; + int triggerchunk = -1; fd = fd; revents = revents; @@ -664,6 +884,12 @@ static int receive_data(int fd, int revents, void *user_data) /* Get the current position. */ sigma_read_pos(&stoppos, &triggerpos); + /* Check if trigger has fired. */ + modestatus = sigma_get_register(READ_MODE); + if (modestatus & 0x20) { + triggerchunk = triggerpos / 512; + } + /* Download sample data. */ for (curchunk = 0; curchunk < numchunks;) { newchunks = MIN(chunks_per_read, numchunks - curchunk); @@ -679,14 +905,20 @@ static int receive_data(int fd, int revents, void *user_data) /* Decode chunks and send them to sigrok. */ for (i = 0; i < newchunks; ++i) { - decode_chunk_ts(buf + (i * CHUNK_SIZE), - &lastts, &lastsample, user_data); + if (curchunk + i == triggerchunk) + decode_chunk_ts(buf + (i * CHUNK_SIZE), + &lastts, &lastsample, + triggerpos & 0x1ff, user_data); + else + decode_chunk_ts(buf + (i * CHUNK_SIZE), + &lastts, &lastsample, + -1, user_data); } curchunk += newchunks; } - /* End of data */ + /* End of data. */ packet.type = DF_END; packet.length = 0; session_bus(user_data, &packet); @@ -694,12 +926,171 @@ static int receive_data(int fd, int revents, void *user_data) return TRUE; } +/* Build a LUT entry used by the trigger functions. */ +static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry) +{ + int i, j, k, bit; + + /* For each quad probe. */ + for (i = 0; i < 4; ++i) { + entry[i] = 0xffff; + + /* For each bit in LUT. */ + for (j = 0; j < 16; ++j) + + /* For each probe in quad. */ + for (k = 0; k < 4; ++k) { + bit = 1 << (i * 4 + k); + + /* Set bit in entry */ + if ((mask & bit) && + ((!(value & bit)) != + (!(j & (1 << k))))) + entry[i] &= ~(1 << j); + } + } +} + +/* Add a logical function to LUT mask. */ +static void add_trigger_function(enum triggerop oper, enum triggerfunc func, + int index, int neg, uint16_t *mask) +{ + int i, j; + int x[2][2], tmp, a, b, aset, bset, rset; + + memset(x, 0, 4 * sizeof(int)); + + /* Trigger detect condition. */ + switch (oper) { + case OP_LEVEL: + x[0][1] = 1; + x[1][1] = 1; + break; + case OP_NOT: + x[0][0] = 1; + x[1][0] = 1; + break; + case OP_RISE: + x[0][1] = 1; + break; + case OP_FALL: + x[1][0] = 1; + break; + case OP_RISEFALL: + x[0][1] = 1; + x[1][0] = 1; + break; + case OP_NOTRISE: + x[1][1] = 1; + x[0][0] = 1; + x[1][0] = 1; + break; + case OP_NOTFALL: + x[1][1] = 1; + x[0][0] = 1; + x[0][1] = 1; + break; + case OP_NOTRISEFALL: + x[1][1] = 1; + x[0][0] = 1; + break; + } + + /* Transpose if neg is set. */ + if (neg) { + for (i = 0; i < 2; ++i) + for (j = 0; j < 2; ++j) { + tmp = x[i][j]; + x[i][j] = x[1-i][1-j]; + x[1-i][1-j] = tmp; + } + } + + /* Update mask with function. */ + for (i = 0; i < 16; ++i) { + a = (i >> (2 * index + 0)) & 1; + b = (i >> (2 * index + 1)) & 1; + + aset = (*mask >> i) & 1; + bset = x[b][a]; + + if (func == FUNC_AND || func == FUNC_NAND) + rset = aset & bset; + else if (func == FUNC_OR || func == FUNC_NOR) + rset = aset | bset; + else if (func == FUNC_XOR || func == FUNC_NXOR) + rset = aset ^ bset; + + if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR) + rset = !rset; + + *mask &= ~(1 << i); + + if (rset) + *mask |= 1 << i; + } +} + +/* + * Build trigger LUTs used by 50 MHz and lower sample rates for supporting + * simple pin change and state triggers. Only two transitions (rise/fall) can be + * set at any time, but a full mask and value can be set (0/1). + */ +static int build_basic_trigger(struct triggerlut *lut) +{ + int i,j; + uint16_t masks[2] = {0, 0}; + + memset(lut, 0, sizeof(struct triggerlut)); + + /* Contant for simple triggers. */ + lut->m4 = 0xa000; + + /* Value/mask trigger support. */ + build_lut_entry(trigger.simplevalue, trigger.simplemask, lut->m2d); + + /* Rise/fall trigger support. */ + for (i = 0, j = 0; i < 16; ++i) { + if (trigger.risingmask & (1 << i) || + trigger.fallingmask & (1 << i)) + masks[j++] = 1 << i; + } + + build_lut_entry(masks[0], masks[0], lut->m0d); + build_lut_entry(masks[1], masks[1], lut->m1d); + + /* Add glue logic */ + if (masks[0] || masks[1]) { + /* Transition trigger. */ + if (masks[0] & trigger.risingmask) + add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3); + if (masks[0] & trigger.fallingmask) + add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3); + if (masks[1] & trigger.risingmask) + add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3); + if (masks[1] & trigger.fallingmask) + add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3); + } else { + /* Only value/mask trigger. */ + lut->m3 = 0xffff; + } + + /* Triggertype: event. */ + lut->params.selres = 3; + + return SIGROK_OK; +} + static int hw_start_acquisition(int device_index, gpointer session_device_id) { struct sigrok_device_instance *sdi; struct datafeed_packet packet; struct datafeed_header header; - uint8_t trigger_option[2] = { 0x38, 0x00 }; + struct clockselect_50 clockselect; + int frac; + uint8_t triggerselect; + struct triggerinout triggerinout_conf; + struct triggerlut lut; session_device_id = session_device_id; @@ -708,36 +1099,71 @@ static int hw_start_acquisition(int device_index, gpointer session_device_id) device_index = device_index; - if (cur_firmware == -1) { - /* Samplerate has not been set. Default to 200 MHz */ - set_samplerate(sdi, 200); - } + /* If the samplerate has not been set, default to 50 MHz. */ + if (cur_firmware == -1) + set_samplerate(sdi, MHZ(50)); - /* Setup trigger (by trigger-in). */ + /* Enter trigger programming mode. */ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20); - /* More trigger setup. */ - sigma_write_register(WRITE_TRIGGER_OPTION, - trigger_option, sizeof(trigger_option)); + /* 100 and 200 MHz mode. */ + if (cur_samplerate >= MHZ(100)) { + sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81); - /* Trigger normal (falling edge). */ - sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08); + triggerselect = (1 << LEDSEL1) | (trigger.fast_fall << 3) | + (trigger.fast_pin & 0x7); - /* Enable pins (200 MHz, 4 pins). */ - sigma_set_register(WRITE_CLOCK_SELECT, 0xf0); + /* All other modes. */ + } else if (cur_samplerate <= MHZ(50)) { + build_basic_trigger(&lut); + + sigma_write_trigger_lut(&lut); + + triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); + } + + /* Setup trigger in and out pins to default values. */ + memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); + triggerinout_conf.trgout_bytrigger = 1; + triggerinout_conf.trgout_enable = 1; + + sigma_write_register(WRITE_TRIGGER_OPTION, + (uint8_t *) &triggerinout_conf, + sizeof(struct triggerinout)); + + /* Go back to normal mode. */ + sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect); + + /* Set clock select register. */ + if (cur_samplerate == MHZ(200)) + /* Enable 4 probes. */ + sigma_set_register(WRITE_CLOCK_SELECT, 0xf0); + else if (cur_samplerate == MHZ(100)) + /* Enable 8 probes. */ + sigma_set_register(WRITE_CLOCK_SELECT, 0x00); + else { + /* + * 50 MHz mode (or fraction thereof). Any fraction down to + * 50 MHz / 256 can be used, but is not supported by sigrok API. + */ + frac = MHZ(50) / cur_samplerate - 1; + + clockselect.async = 0; + clockselect.fraction = frac; + clockselect.disabled_probes = 0; + + sigma_write_register(WRITE_CLOCK_SELECT, + (uint8_t *) &clockselect, + sizeof(clockselect)); + } /* Setup maximum post trigger time. */ - sigma_set_register(WRITE_POST_TRIGGER, 0xff); + sigma_set_register(WRITE_POST_TRIGGER, (capture_ratio * 255) / 100); - /* Start acqusition (software trigger start). */ + /* Start acqusition. */ gettimeofday(&start_tv, 0); sigma_set_register(WRITE_MODE, 0x0d); - /* Add capture source. */ - source_add(0, G_IO_IN, 10, receive_data, session_device_id); - - receive_data(0, 1, session_device_id); - /* Send header packet to the session bus. */ packet.type = DF_HEADER; packet.length = sizeof(struct datafeed_header); @@ -746,9 +1172,12 @@ static int hw_start_acquisition(int device_index, gpointer session_device_id) gettimeofday(&header.starttime, NULL); header.samplerate = cur_samplerate; header.protocol_id = PROTO_RAW; - header.num_probes = 4; + header.num_probes = num_probes; session_bus(session_device_id, &packet); + /* Add capture source. */ + source_add(0, G_IO_IN, 10, receive_data, session_device_id); + return SIGROK_OK; } @@ -776,5 +1205,5 @@ struct device_plugin asix_sigma_plugin_info = { hw_get_capabilities, hw_set_configuration, hw_start_acquisition, - hw_stop_acquisition + hw_stop_acquisition, };