X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=fx2lafw.c;h=42129219fe59883e7403379256bb1459a4a86197;hb=HEAD;hp=401b5fe6a08bfaba439953fcb33720bcec072519;hpb=576c66275f9fbc419b6449a72dd870d29bb4bf31;p=sigrok-firmware-fx2lafw.git diff --git a/fx2lafw.c b/fx2lafw.c index 401b5fe6..42129219 100644 --- a/fx2lafw.c +++ b/fx2lafw.c @@ -1,5 +1,5 @@ /* - * This file is part of the fx2lafw project. + * This file is part of the sigrok-firmware-fx2lafw project. * * Copyright (C) 2011-2012 Uwe Hermann * @@ -14,8 +14,7 @@ * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * along with this program; if not, see . */ /* @@ -28,10 +27,9 @@ * * - We use the FX2 in GPIF mode to sample the data (asynchronously). * - We use the internal 48MHz clock for GPIF. - * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7. - * Support for 16 channels is not yet included, but might be added later. - * - Endpoint 2 is used for data transfers from FX2 to host. - * - The endpoint is quad-buffered. + * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7, + * or PB0-PB7 + PD0-PD7 for 16-channel sampling. + * - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host. * * Documentation: * @@ -40,28 +38,30 @@ #include #include +#include #include #include #include #include - #include #include #include /* ... */ -volatile bit got_sud; +volatile __bit got_sud; BYTE vendor_command; +volatile WORD ledcounter = 0; + static void setup_endpoints(void) { /* Setup EP2 (IN). */ - EP2CFG = (1 << 7) | /* EP is valid/activated */ - (1 << 6) | /* EP direction: IN */ - (1 << 5) | (0 << 4) | /* EP Type: bulk */ - (0 << 3) | /* EP buffer size: 512 */ - (0 << 2) | /* Reserved. */ - (0 << 1) | (0 << 0); /* EP buffering: quad buffering */ + EP2CFG = (1u << 7) | /* EP is valid/activated */ + (1u << 6) | /* EP direction: IN */ + (1u << 5) | (0u << 4) | /* EP Type: bulk */ + (1u << 3) | /* EP buffer size: 1024 */ + (0u << 2) | /* Reserved. */ + (0u << 1) | (0u << 0); /* EP buffering: quad buffering */ SYNCDELAY(); /* Disable all other EPs (EP1, EP4, EP6, and EP8). */ @@ -78,7 +78,7 @@ static void setup_endpoints(void) /* EP2: Reset the FIFOs. */ /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */ - RESETFIFO(0x02) + RESETFIFO(0x02); /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */ EP2FIFOCFG = bmAUTOIN; @@ -95,19 +95,51 @@ static void setup_endpoints(void) SYNCDELAY(); } +static void send_fw_version(void) +{ + /* Populate the buffer. */ + struct version_info *const vi = (struct version_info *)EP0BUF; + vi->major = FX2LAFW_VERSION_MAJOR; + vi->minor = FX2LAFW_VERSION_MINOR; + + /* Send the message. */ + EP0BCH = 0; + SYNCDELAY(); + EP0BCL = sizeof(struct version_info); + SYNCDELAY(); +} + +static void send_revid_version(void) +{ + uint8_t *p; + + /* Populate the buffer. */ + p = (uint8_t *)EP0BUF; + *p = REVID; + + /* Send the message. */ + EP0BCH = 0; + SYNCDELAY(); + EP0BCL = 1; + SYNCDELAY(); +} + BOOL handle_vendorcommand(BYTE cmd) { /* Protocol implementation */ switch (cmd) { case CMD_START: - /* There is data to receive - arm EP0 */ + /* Tell hardware we are ready to receive data. */ + vendor_command = cmd; EP0BCL = 0; + SYNCDELAY(); + return TRUE; case CMD_GET_FW_VERSION: - vendor_command = cmd; + send_fw_version(); + return TRUE; + case CMD_GET_REVID_VERSION: + send_revid_version(); return TRUE; - default: - /* Unimplemented command. */ - break; } return FALSE; @@ -128,7 +160,7 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc) /* We only support interface 0, alternate interface 0. */ if (ifc != 0 || alt_ifc != 0) return FALSE; - + /* Perform procedure from TRM, section 2.3.7: */ /* (1) TODO. */ @@ -136,17 +168,11 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc) /* (2) Reset data toggles of the EPs in the interface. */ /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */ RESETTOGGLE(0x82); -#ifdef DEBUG - RESETTOGGLE(0x86); -#endif /* (3) Restore EPs to their default conditions. */ /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */ RESETFIFO(0x02); /* TODO */ -#ifdef DEBUG - RESETFIFO(0x06); -#endif /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */ @@ -165,29 +191,70 @@ BOOL handle_set_configuration(BYTE cfg) return (cfg == 1) ? TRUE : FALSE; } -void sudav_isr(void) interrupt SUDAV_ISR +void sudav_isr(void) __interrupt(SUDAV_ISR) { got_sud = TRUE; CLEAR_SUDAV(); } -void sof_isr(void) interrupt SOF_ISR using 1 +/* IN BULK NAK - the host started requesting data. */ +void ibn_isr(void) __interrupt(IBN_ISR) { - CLEAR_SOF(); + /* + * If the IBN interrupt is not disabled, clearing + * does not work. See AN78446, 6.2. + */ + BYTE ibnsave = IBNIE; + IBNIE = 0; + CLEAR_USBINT(); + + /* + * If the host sent the START command, start the GPIF + * engine. The host will repeat the BULK IN in the next + * microframe. + */ + if ((IBNIRQ & bmEP2IBN) && (gpif_acquiring == PREPARED)) { + ledcounter = 1; + LED_OFF(); + gpif_acquisition_start(); + } + + /* Clear IBN flags for all EPs. */ + IBNIRQ = 0xff; + + NAKIRQ = bmIBN; + SYNCDELAY(); + + IBNIE = ibnsave; + SYNCDELAY(); } -void usbreset_isr(void) interrupt USBRESET_ISR +void usbreset_isr(void) __interrupt(USBRESET_ISR) { handle_hispeed(FALSE); CLEAR_USBRESET(); } -void hispeed_isr(void) interrupt HISPEED_ISR +void hispeed_isr(void) __interrupt(HISPEED_ISR) { handle_hispeed(TRUE); CLEAR_HISPEED(); } +void timer2_isr(void) __interrupt(TF2_ISR) +{ + /* Blink LED during acquisition, keep it on otherwise. */ + if (gpif_acquiring == RUNNING) { + if (--ledcounter == 0) { + LED_TOGGLE(); + ledcounter = 1000; + } + } else if (gpif_acquiring == STOPPED) { + LED_ON(); + } + TF2 = 0; +} + void fx2lafw_init(void) { /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */ @@ -205,10 +272,20 @@ void fx2lafw_init(void) /* TODO: Does the order of the following lines matter? */ ENABLE_SUDAV(); - ENABLE_SOF(); + ENABLE_EP2IBN(); ENABLE_HISPEED(); ENABLE_USBRESET(); + LED_INIT(); + LED_ON(); + + /* Init timer2. */ + RCAP2L = -500 & 0xff; + RCAP2H = (-500 & 0xff00) >> 8; + T2CON = 0; + ET2 = 1; + TR2 = 1; + /* Global (8051) interrupt enable. */ EA = 1; @@ -228,26 +305,18 @@ void fx2lafw_poll(void) if (vendor_command) { switch (vendor_command) { - case CMD_GET_FW_VERSION: - /* TODO */ - - /* Acknowledge the vendor command. */ - vendor_command = 0; - break; - case CMD_START: - if((EP0CS & bmEPBUSY) != 0) + if ((EP0CS & bmEPBUSY) != 0) break; - if(EP0BCL == 2) { - gpif_acquisition_start( - (const struct cmd_start_acquisition*)EP0BUF); + if (EP0BCL == sizeof(struct cmd_start_acquisition)) { + gpif_acquisition_prepare( + (const struct cmd_start_acquisition *)EP0BUF); } /* Acknowledge the vendor command. */ vendor_command = 0; break; - default: /* Unimplemented command. */ vendor_command = 0; @@ -257,3 +326,10 @@ void fx2lafw_poll(void) gpif_poll(); } + +void main(void) +{ + fx2lafw_init(); + while (1) + fx2lafw_poll(); +}