X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fusb_signalling%2Fpd.py;h=543089e041ef76dbbd51b153eed128a792a200c6;hb=58e7e508ded52194ed06a23a48f169779f4c7708;hp=3760dea85c64a3fe5f1a97cc13f7f607e68a1a6a;hpb=be465111b552c7c2a2262ac49758a30a8bf1b1d5;p=libsigrokdecode.git diff --git a/decoders/usb_signalling/pd.py b/decoders/usb_signalling/pd.py index 3760dea..543089e 100644 --- a/decoders/usb_signalling/pd.py +++ b/decoders/usb_signalling/pd.py @@ -19,12 +19,10 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# USB signalling (low-speed and full-speed) protocol decoder - import sigrokdecode as srd ''' -Protocol output format: +OUTPUT_PYTHON format: Packet: [, ] @@ -92,6 +90,10 @@ class Decoder(srd.Decoder): ['bit', 'Bit'], ['stuffbit', 'Stuff bit'], ] + annotation_rows = ( + ('bits', 'Bits', (1, 2, 3, 4)), + ('symbols', 'Symbols', (0,)), + ) def __init__(self): self.samplerate = None @@ -109,7 +111,7 @@ class Decoder(srd.Decoder): self.state = 'IDLE' def start(self): - self.out_proto = self.register(srd.OUTPUT_PYTHON) + self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): @@ -119,18 +121,15 @@ class Decoder(srd.Decoder): self.bitwidth = float(self.samplerate) / float(self.bitrate) self.halfbit = int(self.bitwidth / 2) - def report(self): - pass - def putpx(self, data): - self.put(self.samplenum, self.samplenum, self.out_proto, data) + self.put(self.samplenum, self.samplenum, self.out_python, data) def putx(self, data): self.put(self.samplenum, self.samplenum, self.out_ann, data) def putpm(self, data): s, h = self.samplenum, self.halfbit - self.put(self.ss_block - h, s + h, self.out_proto, data) + self.put(self.ss_block - h, s + h, self.out_python, data) def putm(self, data): s, h = self.samplenum, self.halfbit @@ -138,7 +137,7 @@ class Decoder(srd.Decoder): def putpb(self, data): s, h = self.samplenum, self.halfbit - self.put(s - h, s + h, self.out_proto, data) + self.put(s - h, s + h, self.out_python, data) def putb(self, data): s, h = self.samplenum, self.halfbit @@ -164,12 +163,14 @@ class Decoder(srd.Decoder): if self.consecutive_ones == 6 and b == '0': # Stuff bit. self.putpb(['STUFF BIT', None]) - self.putb([4, ['SB: %s/%s' % (sym, b)]]) + self.putb([4, ['SB: %s' % b]]) + self.putb([0, ['%s' % sym]]) self.consecutive_ones = 0 else: # Normal bit (not a stuff bit). self.putpb(['BIT', b]) - self.putb([3, ['%s/%s' % (sym, b)]]) + self.putb([3, ['%s' % b]]) + self.putb([0, ['%s' % sym]]) if b == '1': self.consecutive_ones += 1 else: