X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fusb%2Fusb.py;h=07f7bc0736566e142c58b78579916372340d8fc3;hb=557a143d8018ac5b25b0cdde99415433e3663f62;hp=bd402dd23c88a652c54d145f899d6ffda3679f83;hpb=2b7160383cc189f721600c04be17a980e216dfd6;p=libsigrokdecode.git diff --git a/decoders/usb/usb.py b/decoders/usb/usb.py index bd402dd..07f7bc0 100644 --- a/decoders/usb/usb.py +++ b/decoders/usb/usb.py @@ -87,7 +87,6 @@ class Decoder(srd.Decoder): name = 'USB' longname = 'Universal Serial Bus' desc = 'Universal Serial Bus' - longdesc = '...longdesc...' license = 'gplv2+' inputs = ['logic'] outputs = ['usb'] @@ -105,27 +104,25 @@ class Decoder(srd.Decoder): pass def start(self, metadata): - self.rate = metadata['samplerate'] + self.samplerate = metadata['samplerate'] # self.out_proto = self.add(srd.OUTPUT_PROTO, 'usb') self.out_ann = self.add(srd.OUTPUT_ANN, 'usb') - if self.rate < 48000000: - raise Exception('Sample rate (%d) not sufficient for USB ' - 'decoding, need at least 48MHz' % self.rate) + if self.samplerate < 48000000: + raise Exception('Samplerate (%d) not sufficient for USB ' + 'decoding, need at least 48MHz' % self.samplerate) # Initialise decoder state. self.sym = 'J' - self.scount = 0 + self.samplenum = 0 self.packet = '' def report(self): pass def decode(self, ss, es, data): - for (samplenum, (dm, dp)) in data: - - self.scount += 1 + for (self.samplenum, (dm, dp)) in data: sym = syms[dp, dm] @@ -133,16 +130,16 @@ class Decoder(srd.Decoder): if sym == self.sym: continue - if self.scount == 1: + if self.samplenum == 1: # We ignore single sample width pulses. # I sometimes get these with the OLS. self.sym = sym - self.scount = 0 + self.samplenum = 0 continue # How many bits since the last transition? if self.packet != '' or self.sym != 'J': - bitcount = int((self.scount - 1) * 12000000 / self.rate) + bitcount = int((self.samplenum - 1) * 12000000 / self.samplerate) else: bitcount = 0 @@ -154,7 +151,7 @@ class Decoder(srd.Decoder): else: # Longer than EOP, assume reset. self.put(0, 0, self.out_ann, [0, ['RESET']]) - self.scount = 0 + self.samplenum = 0 self.sym = sym self.packet = '' continue @@ -168,6 +165,6 @@ class Decoder(srd.Decoder): elif bitcount > 6: self.put(0, 0, self.out_ann, [0, ['BIT STUFF ERROR']]) - self.scount = 0 + self.samplenum = 0 self.sym = sym