X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fuart%2Fpd.py;h=9b3a6bd2c282321751ca46f3141484fa53e517bb;hb=502acfc2c71a2bbc97d4d7597150cd479bead1ee;hp=c3422434050862027c7e23086df6650e1153feec;hpb=7cf698c5475ac6948d7a9d5c2a6e4ec9cb878d84;p=libsigrokdecode.git diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py index c342243..9b3a6bd 100644 --- a/decoders/uart/pd.py +++ b/decoders/uart/pd.py @@ -19,6 +19,7 @@ ## import sigrokdecode as srd +from math import floor, ceil ''' OUTPUT_PYTHON format: @@ -28,9 +29,10 @@ Packet: This is the list of s and their respective values: - 'STARTBIT': The data is the (integer) value of the start bit (0/1). - - ('DATA', 'DATABITS'): DATA is the (integer) value of the UART data. Valid - values range from 0 to 512 (as the data can be up to 9 bits in size). - 'DATABITS' is the list of individual data bits and their ss/es numbers. + - 'DATA': This is always a tuple containing two items: + - 1st item: the (integer) value of the UART data. Valid values + range from 0 to 512 (as the data can be up to 9 bits in size). + - 2nd item: the list of individual data bits and their ss/es numbers. - 'PARITYBIT': The data is the (integer) value of the parity bit (0/1). - 'STOPBIT': The data is the (integer) value of the stop bit (0 or 1). - 'INVALID STARTBIT': The data is the (integer) value of the start bit (0/1). @@ -138,24 +140,24 @@ class Decoder(srd.Decoder): ) def putx(self, rxtx, data): - s, halfbit = self.startsample[rxtx], int(self.bit_width / 2) - self.put(s - halfbit, self.samplenum + halfbit, self.out_ann, data) + s, halfbit = self.startsample[rxtx], self.bit_width / 2.0 + self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_ann, data) def putpx(self, rxtx, data): - s, halfbit = self.startsample[rxtx], int(self.bit_width / 2) - self.put(s - halfbit, self.samplenum + halfbit, self.out_python, data) + s, halfbit = self.startsample[rxtx], self.bit_width / 2.0 + self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_python, data) def putg(self, data): - s, halfbit = self.samplenum, int(self.bit_width / 2) - self.put(s - halfbit, s + halfbit, self.out_ann, data) + s, halfbit = self.samplenum, self.bit_width / 2.0 + self.put(s - floor(halfbit), s + ceil(halfbit), self.out_ann, data) def putp(self, data): - s, halfbit = self.samplenum, int(self.bit_width / 2) - self.put(s - halfbit, s + halfbit, self.out_python, data) + s, halfbit = self.samplenum, self.bit_width / 2.0 + self.put(s - floor(halfbit), s + ceil(halfbit), self.out_python, data) def putbin(self, rxtx, data): - s, halfbit = self.startsample[rxtx], int(self.bit_width / 2) - self.put(s - halfbit, self.samplenum + halfbit, self.out_bin, data) + s, halfbit = self.startsample[rxtx], self.bit_width / 2.0 + self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_bin, data) def __init__(self, **kwargs): self.samplerate = None @@ -188,7 +190,9 @@ class Decoder(srd.Decoder): # bitpos is the samplenumber which is in the middle of the # specified UART bit (0 = start bit, 1..x = data, x+1 = parity bit # (if used) or the first stop bit, and so on). - bitpos = self.frame_start[rxtx] + (self.bit_width / 2.0) + # The samples within bit are 0, 1, ..., (bit_width - 1), therefore + # index of the middle sample within bit window is (bit_width - 1) / 2. + bitpos = self.frame_start[rxtx] + (self.bit_width - 1) / 2.0 bitpos += bitnum * self.bit_width if self.samplenum >= bitpos: return True @@ -221,6 +225,7 @@ class Decoder(srd.Decoder): # The startbit must be 0. If not, we report an error. if self.startbit[rxtx] != 0: self.putp(['INVALID STARTBIT', rxtx, self.startbit[rxtx]]) + self.putg([rxtx + 10, ['Frame error', 'Frame err', 'FE']]) # TODO: Abort? Ignore rest of the frame? self.cur_data_bit[rxtx] = 0 @@ -320,7 +325,7 @@ class Decoder(srd.Decoder): # Stop bits must be 1. If not, we report an error. if self.stopbit1[rxtx] != 1: self.putp(['INVALID STOPBIT', rxtx, self.stopbit1[rxtx]]) - self.putg([rxtx + 8, ['Frame error', 'Frame err', 'FE']]) + self.putg([rxtx + 10, ['Frame error', 'Frame err', 'FE']]) # TODO: Abort? Ignore the frame? Other? self.state[rxtx] = 'WAIT FOR START BIT'