X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fuart%2Fpd.py;h=070a2f419c3f108b63c7748b08e30e62f142f378;hb=cf60d0bc17b1a8e316ab5ef054f07a5fa59d1585;hp=0fa0e7ff442b8e307a883cbd9711b646be9372cd;hpb=ea36c1988829b9f8e9385ff6e5e506e3cab46877;p=libsigrokdecode.git

diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index 0fa0e7f..070a2f4 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -14,8 +14,7 @@
 ## GNU General Public License for more details.
 ##
 ## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+## along with this program; if not, see <http://www.gnu.org/licenses/>.
 ##
 
 import sigrokdecode as srd
@@ -200,12 +199,6 @@ class Decoder(srd.Decoder):
             return True
         return False
 
-    def reached_bit_last(self, rxtx, bitnum):
-        bitpos = self.frame_start[rxtx] + ((bitnum + 1) * self.bit_width)
-        if self.samplenum >= bitpos:
-            return True
-        return False
-
     def wait_for_start_bit(self, rxtx, old_signal, signal):
         # The start bit is always 0 (low). As the idle UART (and the stop bit)
         # level is 1 (high), the beginning of a start bit is a falling edge.