X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fspiflash%2Flists.py;h=49993ad3cb642637f38964792f519561a55d5b06;hb=77c986b311272b5298f86653639e7cec2e2c01fc;hp=9aa6bd4b0969c7c61d3f9dad1d6135941baf187e;hpb=4539e9ca58966ce3c9cad4801b16c315e86ace01;p=libsigrokdecode.git

diff --git a/decoders/spiflash/lists.py b/decoders/spiflash/lists.py
index 9aa6bd4..49993ad 100644
--- a/decoders/spiflash/lists.py
+++ b/decoders/spiflash/lists.py
@@ -37,6 +37,8 @@ cmds = OrderedDict([
     (0x60, ('CE', 'Chip erase')),
     (0x70, ('ESRY', 'Enable SO to output RY/BY#')),
     (0x80, ('DSRY', 'Disable SO to output RY/BY#')),
+    (0x82, ('WRITE1', 'Main memory page program through buffer 1 with built-in erase')),
+    (0x85, ('WRITE2', 'Main memory page program through buffer 2 with built-in erase')),
     (0x90, ('REMS', 'Read electronic manufacturer & device ID')),
     (0x9f, ('RDID', 'Read identification')),
     (0xab, ('RDP/RES', 'Release from deep powerdown / Read electronic ID')),
@@ -46,11 +48,15 @@ cmds = OrderedDict([
     (0xbb, ('2READ', '2x I/O read')), # a.k.a. "Fast read dual I/O".
     (0xc1, ('EXSO', 'Exit secured OTP')),
     (0xc7, ('CE2', 'Chip erase')), # Alternative command ID
+    (0xd7, ('STATUS', 'Status register read')),
     (0xd8, ('BE', 'Block erase')),
     (0xef, ('REMS2', 'Read ID for 2x I/O mode')),
 ])
 
 device_name = {
+    'adesto': {
+        0x00: 'AT45Dxxx family, standard series',
+    },
     'fidelix': {
         0x15: 'FM25Q32',
     },
@@ -59,9 +65,47 @@ device_name = {
         0x15: 'MX25L3205D',
         0x16: 'MX25L6405D',
     },
+    'winbond': {
+        0x13: 'W25Q80DV',
+    },
 }
 
 chips = {
+    # Adesto
+    'adesto_at45db161e': {
+        'vendor': 'Adesto',
+        'model': 'AT45DB161E',
+        'res_id': None, # The chip doesn't emit an ID here.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': 0x1f26000100, # RDID and 2 extra "EDI" bytes.
+        'page_size': 528, # Configurable, could also be 512 bytes.
+        'sector_size': 128 * 1024,
+        'block_size': 4 * 1024,
+    },
+    # Atmel
+    'atmel_at25128': {
+        'vendor': 'Atmel',
+        'model': 'AT25128',
+        'res_id': None, # Not supported by the chip.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': None, # Not supported by the chip.
+        'page_size': 64,
+        'sector_size': None, # The chip doesn't have sectors.
+        'block_size': None, # The chip doesn't have blocks.
+    },
+    'atmel_at25256': {
+        'vendor': 'Atmel',
+        'model': 'AT25256',
+        'res_id': None, # Not supported by the chip.
+        'rems_id': None, # Not supported by the chip.
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': None, # Not supported by the chip.
+        'page_size': 64,
+        'sector_size': None, # The chip doesn't have sectors.
+        'block_size': None, # The chip doesn't have blocks.
+    },
     # FIDELIX
     'fidelix_fm25q32': {
         'vendor': 'FIDELIX',
@@ -108,4 +152,16 @@ chips = {
         'sector_size': 4 * 1024,
         'block_size': 64 * 1024,
     },
+    # Winbond
+    'winbond_w25q80dv': {
+        'vendor': 'Winbond',
+        'model': 'W25Q80DV',
+        'res_id': 0x13,
+        'rems_id': 0xef13,
+        'rems2_id': None, # Not supported by the chip.
+        'rdid_id': 0xef4014,
+        'page_size': 256,
+        'sector_size': 4 * 1024,
+        'block_size': 64 * 1024, # Configurable, could also be 32 * 1024 bytes.
+    },
 }