X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fspi.py;h=c2d3120566db33db80b85d90e76295030dc5251d;hb=ffe880e79ccd98de803706e0a02c0df2574e29ee;hp=383206b1914a6069e642f435516b594d575d9304;hpb=e100d51ec0909db8f93c837ea1fd92a08461b781;p=libsigrokdecode.git

diff --git a/decoders/spi.py b/decoders/spi.py
index 383206b..c2d3120 100644
--- a/decoders/spi.py
+++ b/decoders/spi.py
@@ -18,21 +18,24 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
+import sigrok
+
 class Sample():
     def __init__(self, data):
         self.data = data
     def probe(self, probe):
-        s = ord(self.data[probe / 8]) & (1 << (probe % 8))
+        s = ord(self.data[int(probe / 8)]) & (1 << (probe % 8))
         return True if s else False
 
 def sampleiter(data, unitsize):
     for i in range(0, len(data), unitsize):
         yield(Sample(data[i:i+unitsize]))
 
-class Decoder():
-    name = 'SPI Decoder'
+class Decoder(sigrok.Decoder):
+    id = 'spi'
+    name = 'SPI'
     desc = '...desc...'
-    longname = '...longname...'
+    longname = 'Serial Peripheral Interface (SPI) bus'
     longdesc = '...longdesc...'
     author = 'Gareth McMullin'
     email = 'gareth@blacksphere.co.nz'
@@ -49,16 +52,20 @@ class Decoder():
         self.rxcount = 0
         self.rxdata = 0
         self.bytesreceived = 0
+        self.output_protocol = None
+        self.output_annotation = None
 
     def start(self, metadata):
         self.unitsize = metadata['unitsize']
+        # self.output_protocol = self.output_new(2)
+        self.output_annotation = self.output_new(1)
 
     def report(self):
         return 'SPI: %d bytes received' % self.bytesreceived
 
-    def decode(self, data):
+    def decode(self, timeoffset, duration, data):
         # We should accept a list of samples and iterate...
-        for sample in sampleiter(data['data'], self.unitsize):
+        for sample in sampleiter(data, self.unitsize):
 
             sck = sample.probe(self.probes['sck'])
             # Sample SDATA on rising SCK
@@ -70,7 +77,7 @@ class Decoder():
 
             # If this is first bit, save timestamp
             if self.rxcount == 0:
-                self.time = data['time']
+                self.time = timeoffset # FIXME
             # Receive bit into our shift register
             sdata = sample.probe(self.probes['sdata'])
             if sdata:
@@ -81,34 +88,16 @@ class Decoder():
                 continue
             # Received a byte, pass up to sigrok
             outdata = {'time':self.time,
-                'duration':data['time'] + data['duration'] - self.time,
+                'duration':timeoffset + duration - self.time,
                 'data':self.rxdata,
                 'display':('%02X' % self.rxdata),
                 'type':'spi',
             }
-            sigrok.put(outdata)
+            # self.put(self.output_protocol, 0, 0, out_proto)
+            self.put(self.output_annotation, 0, 0, outdata)
             # Reset decoder state
             self.rxdata = 0
             self.rxcount = 0
             # Keep stats for summary
             self.bytesreceived += 1
 
-if __name__ == '__main__':
-    data = open('spi_dump.bin').read()
-
-    # dummy class to keep Decoder happy for test
-    class Sigrok():
-        def put(self, data):
-            print "\t", data
-    sigrok = Sigrok()
-
-    dec = Decoder(driver='ols', unitsize=1, starttime=0)
-    dec.decode({'time':0, 'duration':len(data), 'data':data, 'type':'logic'})
-
-    print dec.summary()
-else:
-    import sigrok
-
-#Tested with:
-#  sigrok-cli -d 0:samplerate=1000000:rle=on --time=1s -p 1,2 -a spidec
-