X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Frtc8564%2Fpd.py;h=d71e62b8b9b268333df9013923885e822aa4369f;hb=1fc5b8a515eb06e759e109728b6f18ccdef0c686;hp=8560ac76b2f44925bba9dd5c93412a2b812fa3de;hpb=b197383cfb39b39ff04644855eef57f5d3c18bc1;p=libsigrokdecode.git

diff --git a/decoders/rtc8564/pd.py b/decoders/rtc8564/pd.py
index 8560ac7..d71e62b 100644
--- a/decoders/rtc8564/pd.py
+++ b/decoders/rtc8564/pd.py
@@ -35,7 +35,8 @@ class Decoder(srd.Decoder):
     desc = 'Realtime clock module protocol.'
     license = 'gplv2+'
     inputs = ['i2c']
-    outputs = ['rtc8564']
+    outputs = []
+    tags = ['Clock/timing']
     annotations = reg_list() + (
         ('read', 'Read date/time'),
         ('write', 'Write date/time'),
@@ -47,11 +48,14 @@ class Decoder(srd.Decoder):
     )
     annotation_rows = (
         ('bits', 'Bits', tuple(range(0, 8 + 1)) + (11, 12, 13)),
-        ('regs', 'Register access', (14, 15)),
+        ('regs', 'Register accesses', (14, 15)),
         ('date-time', 'Date/time', (9, 10)),
     )
 
     def __init__(self):
+        self.reset()
+
+    def reset(self):
         self.state = 'IDLE'
         self.hours = -1
         self.minutes = -1