X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fpwm%2Fpd.py;h=2eda02ca42a1c174b48aa66e19bf74d7f36137b5;hb=HEAD;hp=148b34bd76a4dca5581ba0878f1faecca84a2768;hpb=9658c7100a62499cce1939193c8be80bb300d0f8;p=libsigrokdecode.git diff --git a/decoders/pwm/pd.py b/decoders/pwm/pd.py index 148b34b..2eda02c 100644 --- a/decoders/pwm/pd.py +++ b/decoders/pwm/pd.py @@ -15,21 +15,24 @@ ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## along with this program; if not, see . ## import sigrokdecode as srd +class SamplerateError(Exception): + pass + class Decoder(srd.Decoder): - api_version = 2 + api_version = 3 id = 'pwm' name = 'PWM' longname = 'Pulse-width modulation' desc = 'Analog level encoded in duty cycle percentage.' license = 'gplv2+' inputs = ['logic'] - outputs = ['pwm'] + outputs = [] + tags = ['Encoding'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) @@ -39,82 +42,100 @@ class Decoder(srd.Decoder): ) annotations = ( ('duty-cycle', 'Duty cycle'), + ('period', 'Period'), + ) + annotation_rows = ( + ('duty-cycle-vals', 'Duty cycles', (0,)), + ('periods', 'Periods', (1,)), ) binary = ( ('raw', 'RAW file'), ) - def __init__(self, **kwargs): - self.ss = self.es = None - self.first_transition = True - self.first_samplenum = None - self.start_samplenum = None - self.end_samplenum = None - self.oldpin = None - self.num_cycles = 0 - self.average = 0 + def __init__(self): + self.reset() + + def reset(self): + self.samplerate = None + self.ss_block = self.es_block = None + + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value def start(self): - self.startedge = 0 if self.options['polarity'] == 'active-low' else 1 self.out_ann = self.register(srd.OUTPUT_ANN) - self.out_bin = self.register(srd.OUTPUT_BINARY) + self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_average = \ self.register(srd.OUTPUT_META, meta=(float, 'Average', 'PWM base (cycle) frequency')) def putx(self, data): - self.put(self.ss, self.es, self.out_ann, data) + self.put(self.ss_block, self.es_block, self.out_ann, data) + + def putp(self, period_t): + # Adjust granularity. + if period_t == 0 or period_t >= 1: + period_s = '%.1f s' % (period_t) + elif period_t <= 1e-12: + period_s = '%.1f fs' % (period_t * 1e15) + elif period_t <= 1e-9: + period_s = '%.1f ps' % (period_t * 1e12) + elif period_t <= 1e-6: + period_s = '%.1f ns' % (period_t * 1e9) + elif period_t <= 1e-3: + period_s = '%.1f μs' % (period_t * 1e6) + else: + period_s = '%.1f ms' % (period_t * 1e3) + + self.put(self.ss_block, self.es_block, self.out_ann, [1, [period_s]]) def putb(self, data): - self.put(self.num_cycles, self.num_cycles, self.out_bin, data) - - def decode(self, ss, es, data): - - for (self.samplenum, pins) in data: - # Ignore identical samples early on (for performance reasons). - if self.oldpin == pins[0]: - continue - - # Initialize self.oldpins with the first sample value. - if self.oldpin is None: - self.oldpin = pins[0] - continue - - if self.first_transition: - # First rising edge - if self.oldpin != self.startedge: - self.first_samplenum = self.samplenum - self.start_samplenum = self.samplenum - self.first_transition = False - else: - if self.oldpin != self.startedge: - # Rising edge - # We are on a full cycle we can calculate - # the period, the duty cycle and its ratio. - period = self.samplenum - self.start_samplenum - duty = self.end_samplenum - self.start_samplenum - ratio = float(duty / period) - - # This interval starts at this edge. - self.ss = self.start_samplenum - # Store the new rising edge position and the ending - # edge interval. - self.start_samplenum = self.es = self.samplenum - - # Report the duty cycle in percent. - percent = float(ratio * 100) - self.putx([0, ["%f%%" % percent]]) - - # Report the duty cycle in the binary output. - self.putb((0, bytes([int(ratio * 256)]))) - - # Update and report the new duty cycle average. - self.num_cycles += 1 - self.average += percent - self.put(self.first_samplenum, self.es, self.out_average, - float(self.average / self.num_cycles)) - else: - # Falling edge - self.end_samplenum = self.ss = self.samplenum - - self.oldpin = pins[0] + self.put(self.ss_block, self.es_block, self.out_binary, data) + + def decode(self): + if not self.samplerate: + raise SamplerateError('Cannot decode without samplerate.') + + num_cycles = 0 + average = 0 + + # Wait for an "active" edge (depends on config). This starts + # the first full period of the inspected signal waveform. + self.wait({0: 'f' if self.options['polarity'] == 'active-low' else 'r'}) + self.first_samplenum = self.samplenum + + # Keep getting samples for the period's middle and terminal edges. + # At the same time that last sample starts the next period. + while True: + + # Get the next two edges. Setup some variables that get + # referenced in the calculation and in put() routines. + start_samplenum = self.samplenum + self.wait({0: 'e'}) + end_samplenum = self.samplenum + self.wait({0: 'e'}) + self.ss_block = start_samplenum + self.es_block = self.samplenum + + # Calculate the period, the duty cycle, and its ratio. + period = self.samplenum - start_samplenum + duty = end_samplenum - start_samplenum + ratio = float(duty / period) + + # Report the duty cycle in percent. + percent = float(ratio * 100) + self.putx([0, ['%f%%' % percent]]) + + # Report the duty cycle in the binary output. + self.putb([0, bytes([int(ratio * 256)])]) + + # Report the period in units of time. + period_t = float(period / self.samplerate) + self.putp(period_t) + + # Update and report the new duty cycle average. + num_cycles += 1 + average += percent + self.put(self.first_samplenum, self.es_block, self.out_average, + float(average / num_cycles))