X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fpca9571%2Fpd.py;h=ea8715d6d2ca15c1fecfd5d7b61ddc18a9eae215;hb=114adb4997b71e93267e3816710c8b019ae927c0;hp=85310819442f0c3b44e50366316c46faf5bbc2e6;hpb=460e6cfa5d45c8d2ba0f5be1235ab31d4ec9508b;p=libsigrokdecode.git diff --git a/decoders/pca9571/pd.py b/decoders/pca9571/pd.py index 8531081..ea8715d 100644 --- a/decoders/pca9571/pd.py +++ b/decoders/pca9571/pd.py @@ -23,7 +23,7 @@ NUM_OUTPUT_CHANNELS = 8 # TODO: Other I²C functions: general call / reset address, device ID address. -def logic_channels(num_channels, samplerate): +def logic_channels(num_channels): l = [] for i in range(num_channels): l.append(tuple(['p%d' % i, 'P%d' % i])) @@ -55,18 +55,24 @@ class Decoder(srd.Decoder): def reset(self): self.state = 'IDLE' - self.ss_logic = -1 self.last_write = 0xFF # Chip port default state is high. + self.last_write_es = 0 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.out_logic = self.register(srd.OUTPUT_LOGIC) + def flush(self): + self.put_logic_states() + def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) - def putl(self, data): - self.put(self.ss_logic, self.ss_logic, self.out_logic, data) + def put_logic_states(self): + if (self.es > self.last_write_es): + data = bytes([self.last_write]) + self.put(self.last_write_es, self.es, self.out_logic, [0, data]) + self.last_write_es = self.es def handle_io(self, b): if self.state == 'READ DATA': @@ -76,13 +82,11 @@ class Decoder(srd.Decoder): '(%02X) are different' % self.last_write]]) else: operation = ['Outputs set', 'W'] + self.put_logic_states() self.last_write = b + self.putx([1, [operation[0] + ': %02X' % b, operation[1] + ': %02X' % b]]) - self.ss_logic = self.ss - for i in range(NUM_OUTPUT_CHANNELS): - bit = (b & (1 << i)) != 0 - self.putl([i, bytes([bit])]) def check_correct_chip(self, addr): if addr != 0x25: