X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fpca9571%2Fpd.py;h=df309e917d624c9458c93415693635f4b844386d;hb=HEAD;hp=600095247d08f268f3b669bcad19850437e9447e;hpb=f22b1c7447e29573ca60a5a3c6d5b5dcb41282fe;p=libsigrokdecode.git

diff --git a/decoders/pca9571/pd.py b/decoders/pca9571/pd.py
index 6000952..ea8715d 100644
--- a/decoders/pca9571/pd.py
+++ b/decoders/pca9571/pd.py
@@ -26,7 +26,7 @@ NUM_OUTPUT_CHANNELS = 8
 def logic_channels(num_channels):
     l = []
     for i in range(num_channels):
-        l.append(tuple(['p%d' % i, 'P%d' % i, 100000]))
+        l.append(tuple(['p%d' % i, 'P%d' % i]))
     return tuple(l)
 
 class Decoder(srd.Decoder):
@@ -55,18 +55,24 @@ class Decoder(srd.Decoder):
 
     def reset(self):
         self.state = 'IDLE'
-        self.ss_logic = -1
         self.last_write = 0xFF # Chip port default state is high.
+        self.last_write_es = 0
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
         self.out_logic = self.register(srd.OUTPUT_LOGIC)
 
+    def flush(self):
+        self.put_logic_states()
+
     def putx(self, data):
         self.put(self.ss, self.es, self.out_ann, data)
 
-    def putl(self, data):
-        self.put(self.ss_logic, self.ss_logic, self.out_logic, data)
+    def put_logic_states(self):
+        if (self.es > self.last_write_es):
+            data = bytes([self.last_write])
+            self.put(self.last_write_es, self.es, self.out_logic, [0, data])
+            self.last_write_es = self.es
 
     def handle_io(self, b):
         if self.state == 'READ DATA':
@@ -76,13 +82,11 @@ class Decoder(srd.Decoder):
                                '(%02X) are different' % self.last_write]])
         else:
             operation = ['Outputs set', 'W']
+            self.put_logic_states()
             self.last_write = b
+
         self.putx([1, [operation[0] + ': %02X' % b,
                        operation[1] + ': %02X' % b]])
-        self.ss_logic = self.ss
-        for i in range(NUM_OUTPUT_CHANNELS):
-            bit = (b & (1 << i)) != 0
-            self.putl([i, bytes([bit])])
 
     def check_correct_chip(self, addr):
         if addr != 0x25: