X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fparallel%2F__init__.py;h=ee8b4447d45db8c9ad448f5b59dc1791953189d0;hb=35b380b1156434b73d4a976c68f5ab3604c8510a;hp=a338c43ae4bf01c0c78e8575870f57a2d0e82344;hpb=25e1418afe855a77be29bca4350dc49220dd3143;p=libsigrokdecode.git

diff --git a/decoders/parallel/__init__.py b/decoders/parallel/__init__.py
index a338c43..ee8b444 100644
--- a/decoders/parallel/__init__.py
+++ b/decoders/parallel/__init__.py
@@ -20,13 +20,16 @@
 
 '''
 This protocol decoder can decode synchronous parallel buses with various
-number of data bits/probes and one clock line.
+number of data bits/channels and one (optional) clock line.
 
-It is required to use the lowest data probes, and use consecutive ones.
-For example, for a 4-bit sync parallel bus, probes D0/D1/D2/D3 (and CLK)
+If no clock line is supplied, the decoder works slightly differently in
+that it interprets every transition on any of the supplied data channels
+like there had been a clock transition.
+
+It is required to use the lowest data channels, and use consecutive ones.
+For example, for a 4-bit sync parallel bus, channels D0/D1/D2/D3 (and CLK)
 should be used. Using combinations like D7/D12/D3/D15 is not supported.
 For an 8-bit bus you should use D0-D7, for a 16-bit bus use D0-D15 and so on.
 '''
 
 from .pd import *
-