X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fltc26x7%2Fpd.py;h=3255d5fd2eea0cec8819d3054f4616a8fb7f9bc1;hb=ab88bae1c7b9;hp=ea05a25207d9b5c6141aef27377eca1d278bfbec;hpb=4d9f16409d6ffde7bef4d555eb4f07a2f2e946d6;p=libsigrokdecode.git

diff --git a/decoders/ltc26x7/pd.py b/decoders/ltc26x7/pd.py
index ea05a25..3255d5f 100644
--- a/decoders/ltc26x7/pd.py
+++ b/decoders/ltc26x7/pd.py
@@ -39,7 +39,7 @@ addresses = {
     0x0F: ['All DACs', 'All'],
 }
 
-input_voltage_format = ['%fV', '%fV', '%.6fV', '%.2fV']
+input_voltage_format = ['%.6fV', '%.2fV']
 
 class Decoder(srd.Decoder):
     api_version = 3
@@ -50,20 +50,23 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['i2c']
     outputs = []
-    tags = ['Display']
+    tags = ['IC', 'Analog/digital']
     options = (
-        {'id': 'part', 'desc': 'Part', 'default': 'ltc26x7',
+        {'id': 'chip', 'desc': 'Chip', 'default': 'ltc2607',
             'values': ('ltc2607', 'ltc2617', 'ltc2627')},
-        {'id': 'ref', 'desc': 'Reference voltage', 'default': 1.5},
+        {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5},
     )
     annotations = (
         ('slave_addr', 'Slave address'),
         ('command', 'Command'),
         ('address', 'Address'),
-        ('data', '2 byte data'),
+        ('dac_a_voltage', 'DAC A voltage'),
+        ('dac_b_voltage', 'DAC B voltage'),
     )
     annotation_rows = (
-        ('ltc26x7', 'LTC26x7 data', (0, 1, 2, 3)),
+        ('addr_cmd', 'Address/command', (0, 1, 2)),
+        ('dac_a_voltages', 'DAC A voltages', (3,)),
+        ('dac_b_voltages', 'DAC B voltages', (4,)),
     )
 
     def __init__(self):
@@ -73,6 +76,7 @@ class Decoder(srd.Decoder):
         self.state = 'IDLE'
         self.ss = -1
         self.data = 0x00
+        self.dac_val = 0
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
@@ -116,29 +120,33 @@ class Decoder(srd.Decoder):
 
     def handle_cmd_addr(self, data):
         cmd_val = (data >> 4) & 0x0F
-        dac_val = (data & 0x0F)
+        self.dac_val = (data & 0x0F)
         sm = (self.ss + self.es) // 2
 
         self.put(self.ss, sm, self.out_ann, [1, commands[cmd_val]])
-        self.put(sm, self.es, self.out_ann, [2, addresses[dac_val]])
+        self.put(sm, self.es, self.out_ann, [2, addresses[self.dac_val]])
 
     def handle_data(self, data):
         self.data = (self.data << 8) & 0xFF00
         self.data += data
-        if self.options['part'] == 'ltc2617':
+        if self.options['chip'] == 'ltc2617':
             self.data = (self.data >> 2)
-            self.data = (self.options['ref'] * self.data) / 0x3FFF
-        elif self.options['part'] == 'ltc2627':
+            self.data = (self.options['vref'] * self.data) / 0x3FFF
+        elif self.options['chip'] == 'ltc2627':
             self.data = (self.data >> 4)
-            self.data = (self.options['ref'] * self.data) / 0x0FFF
+            self.data = (self.options['vref'] * self.data) / 0x0FFF
         else:
-            self.data = (self.options['ref'] * self.data) / 0xFFFF
+            self.data = (self.options['vref'] * self.data) / 0xFFFF
         ann = []
         for format in input_voltage_format:
             ann.append(format % self.data)
         self.data = 0
 
-        self.put(self.ss, self.es, self.out_ann, [3, ann])
+        if self.dac_val == 0x0F: # All DACs (A and B).
+            self.put(self.ss, self.es, self.out_ann, [3 + 0, ann])
+            self.put(self.ss, self.es, self.out_ann, [3 + 1, ann])
+        else:
+            self.put(self.ss, self.es, self.out_ann, [3 + self.dac_val, ann])
 
     def decode(self, ss, es, data):
         cmd, databyte = data