X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fjtag_stm32%2Fpd.py;h=7d6a71d2ba8180707830359020eb50ac3b674cfc;hb=86f685145345cabef1373a1242016b769ff199b4;hp=5dba78761dcd35c755da7601ebcf5096cf1f8a38;hpb=8915b34659332288aab38780d8f10d75c4c83e7f;p=libsigrokdecode.git

diff --git a/decoders/jtag_stm32/pd.py b/decoders/jtag_stm32/pd.py
index 5dba787..7d6a71d 100644
--- a/decoders/jtag_stm32/pd.py
+++ b/decoders/jtag_stm32/pd.py
@@ -18,8 +18,6 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-# ST STM32 JTAG protocol decoder
-
 import sigrokdecode as srd
 
 # JTAG debug port data registers (in IR[3:0]) and their sizes (in bits)
@@ -133,7 +131,7 @@ class Decoder(srd.Decoder):
     optional_probes = []
     options = {}
     annotations = [
-        ['Text', 'Human-readable text'],
+        ['text', 'Human-readable text'],
     ]
 
     def __init__(self, **kwargs):
@@ -141,11 +139,8 @@ class Decoder(srd.Decoder):
         # self.state = 'BYPASS'
 
     def start(self):
-        # self.out_proto = self.add(srd.OUTPUT_PROTO, 'jtag_stm32')
-        self.out_ann = self.add(srd.OUTPUT_ANN, 'jtag_stm32')
-
-    def report(self):
-        pass
+        # self.out_python = self.register(srd.OUTPUT_PYTHON)
+        self.out_ann = self.register(srd.OUTPUT_ANN)
 
     def handle_reg_bypass(self, cmd, bits):
         # TODO