X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fir_nec%2Fpd.py;h=dffe23eedbe5d48687c03d1230bd7ce5d715370d;hb=de219b2b77dba06815869823789458581500ca03;hp=c05e4744dc6a76c06f3007c2387040bcfa71a096;hpb=17e0ba228dadb7a12aa0e11fa81fcbc4a7836349;p=libsigrokdecode.git diff --git a/decoders/ir_nec/pd.py b/decoders/ir_nec/pd.py index c05e474..dffe23e 100644 --- a/decoders/ir_nec/pd.py +++ b/decoders/ir_nec/pd.py @@ -21,6 +21,19 @@ from common.srdhelper import bitpack from .lists import * import sigrokdecode as srd +# Concentrate all timing constraints of the IR protocol here in a single +# location at the top of the source, to raise awareness and to simplify +# review and adjustment. The tolerance is an arbitrary choice, available +# literature does not mention any. The inter-frame timeout is not a part +# of the protocol, but an implementation detail of this sigrok decoder. +_TIME_TOL = 8 # tolerance, in percent +_TIME_IDLE = 20.0 # inter-frame timeout, in ms +_TIME_LC = 13.5 # leader code, in ms +_TIME_RC = 11.25 # repeat code, in ms +_TIME_ONE = 2.25 # one data bit, in ms +_TIME_ZERO = 1.125 # zero data bit, in ms +_TIME_STOP = 0.562 # stop bit, in ms + class SamplerateError(Exception): pass @@ -47,7 +60,7 @@ class Decoder(srd.Decoder): ) options = ( {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low', - 'values': ('active-low', 'active-high')}, + 'values': ('auto', 'active-low', 'active-high')}, {'id': 'cd_freq', 'desc': 'Carrier Frequency', 'default': 0}, {'id': 'extended', 'desc': 'Extended NEC Protocol', 'default': 'no', 'values': ('yes', 'no')}, @@ -136,12 +149,13 @@ class Decoder(srd.Decoder): self.samplerate = value def calc_rate(self): - self.tolerance = 0.05 # +/-5% - self.lc = int(self.samplerate * 0.0135) - 1 # 13.5ms - self.rc = int(self.samplerate * 0.01125) - 1 # 11.25ms - self.dazero = int(self.samplerate * 0.001125) - 1 # 1.125ms - self.daone = int(self.samplerate * 0.00225) - 1 # 2.25ms - self.stop = int(self.samplerate * 0.000652) - 1 # 0.652ms + self.tolerance = _TIME_TOL / 100 + self.lc = int(self.samplerate * _TIME_LC / 1000) - 1 + self.rc = int(self.samplerate * _TIME_RC / 1000) - 1 + self.dazero = int(self.samplerate * _TIME_ZERO / 1000) - 1 + self.daone = int(self.samplerate * _TIME_ONE / 1000) - 1 + self.stop = int(self.samplerate * _TIME_STOP / 1000) - 1 + self.idle_to = int(self.samplerate * _TIME_IDLE / 1000) - 1 def compare_with_tolerance(self, measured, base): return (measured >= base * (1 - self.tolerance) @@ -179,11 +193,10 @@ class Decoder(srd.Decoder): self.data = [] self.ss_bit = self.ss_start = self.samplenum return True + self.putd(show, want_len) if check and not valid: warn_show = bitpack(self.data) self.putx([Ann.WARN, ['{} error: 0x{:04X}'.format(name, warn_show)]]) - else: - self.putd(show, want_len) self.data = [] self.ss_bit = self.ss_start = self.samplenum return valid @@ -198,7 +211,12 @@ class Decoder(srd.Decoder): cd_count = int(self.samplerate / self.options['cd_freq']) + 1 prev_ir = None - active = 0 if self.options['polarity'] == 'active-low' else 1 + if self.options['polarity'] == 'auto': + # Take sample 0 as reference. + curr_level, = self.wait({'skip': 0}) + active = 1 - curr_level + else: + active = 0 if self.options['polarity'] == 'active-low' else 1 self.is_extended = self.options['extended'] == 'yes' want_addr_len = 16 if self.is_extended else 8 @@ -228,21 +246,27 @@ class Decoder(srd.Decoder): (self.ir,) = self.wait({Pin.IR: 'e'}) if self.ir != active: - # Save the non-active edge, then wait for the next edge. + # Save the location of the non-active edge (recessive), + # then wait for the next edge. Immediately process the + # end of the STOP bit which completes an IR frame. self.ss_other_edge = self.samplenum - continue + if self.state != 'STOP': + continue - b = self.samplenum - self.ss_bit + # Reset internal state for long periods of idle level. + width = self.samplenum - self.ss_bit + if width >= self.idle_to and self.state != 'STOP': + self.reset() # State machine. if self.state == 'IDLE': - if self.compare_with_tolerance(b, self.lc): + if self.compare_with_tolerance(width, self.lc): self.putpause('Long') self.putx([Ann.LEADER_CODE, ['Leader code', 'Leader', 'LC', 'L']]) self.ss_remote = self.ss_start self.data = [] self.state = 'ADDRESS' - elif self.compare_with_tolerance(b, self.rc): + elif self.compare_with_tolerance(width, self.rc): self.putpause('Short') self.putstop(self.samplenum) self.samplenum += self.stop @@ -250,23 +274,25 @@ class Decoder(srd.Decoder): self.data = [] self.ss_bit = self.ss_start = self.samplenum elif self.state == 'ADDRESS': - self.handle_bit(b) + self.handle_bit(width) if len(self.data) == want_addr_len: self.data_ok(False, want_addr_len) self.state = 'COMMAND' if self.is_extended else 'ADDRESS#' elif self.state == 'ADDRESS#': - self.handle_bit(b) + self.handle_bit(width) if len(self.data) == 16: - self.state = 'COMMAND' if self.data_ok(True, 8) else 'IDLE' + self.data_ok(True, 8) + self.state = 'COMMAND' elif self.state == 'COMMAND': - self.handle_bit(b) + self.handle_bit(width) if len(self.data) == 8: self.data_ok(False, 8) self.state = 'COMMAND#' elif self.state == 'COMMAND#': - self.handle_bit(b) + self.handle_bit(width) if len(self.data) == 16: - self.state = 'STOP' if self.data_ok(True, 8) else 'IDLE' + self.data_ok(True, 8) + self.state = 'STOP' elif self.state == 'STOP': self.putstop(self.ss_bit) self.putremote()