X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fi2c%2Fpd.py;h=2b8b302e086184f1952c58cf0fef44d6dba8fab2;hb=2824e81140d3a8e37464f758cf67f50f2f7afca7;hp=2db7d21f6a74ca7bf3d35ed0e8d32995ce6a908d;hpb=de038c4710b3ed11bd7a745ae86ecaf0a63a300d;p=libsigrokdecode.git

diff --git a/decoders/i2c/pd.py b/decoders/i2c/pd.py
index 2db7d21..2b8b302 100644
--- a/decoders/i2c/pd.py
+++ b/decoders/i2c/pd.py
@@ -28,10 +28,10 @@ import sigrokdecode as srd
 '''
 OUTPUT_PYTHON format:
 
-I²C packet:
-[<cmd>, <data>]
+Packet:
+[<ptype>, <pdata>]
 
-<cmd> is one of:
+<ptype>:
  - 'START' (START condition)
  - 'START REPEAT' (Repeated START condition)
  - 'ADDRESS READ' (Slave address, read)
@@ -41,12 +41,12 @@ I²C packet:
  - 'STOP' (STOP condition)
  - 'ACK' (ACK bit)
  - 'NACK' (NACK bit)
- - 'BITS' (<data>: list of data/address bits and their ss/es numbers)
+ - 'BITS' (<pdata>: list of data/address bits and their ss/es numbers)
 
-<data> is the data or address byte associated with the 'ADDRESS*' and 'DATA*'
+<pdata> is the data or address byte associated with the 'ADDRESS*' and 'DATA*'
 command. Slave addresses do not include bit 0 (the READ/WRITE indication bit).
 For example, a slave address field could be 0x51 (instead of 0xa2).
-For 'START', 'START REPEAT', 'STOP', 'ACK', and 'NACK' <data> is None.
+For 'START', 'START REPEAT', 'STOP', 'ACK', and 'NACK' <pdata> is None.
 '''
 
 # CMD: [annotation-type-index, long annotation, short annotation]
@@ -63,8 +63,11 @@ proto = {
     'DATA WRITE':      [9, 'Data write',    'DW'],
 }
 
+class SamplerateError(Exception):
+    pass
+
 class Decoder(srd.Decoder):
-    api_version = 1
+    api_version = 2
     id = 'i2c'
     name = 'I²C'
     longname = 'Inter-Integrated Circuit'
@@ -72,27 +75,27 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['i2c']
-    probes = [
+    channels = (
         {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'},
         {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'},
-    ]
-    optional_probes = []
-    options = {
-        'address_format': ['Displayed slave address format', 'shifted'],
-    }
-    annotations = [
-        ['start', 'Start condition'],
-        ['repeat-start', 'Repeat start condition'],
-        ['stop', 'Stop condition'],
-        ['ack', 'ACK'],
-        ['nack', 'NACK'],
-        ['bit', 'Data/address bit'],
-        ['address-read', 'Address read'],
-        ['address-write', 'Address write'],
-        ['data-read', 'Data read'],
-        ['data-write', 'Data write'],
-        ['warnings', 'Human-readable warnings'],
-    ]
+    )
+    options = (
+        {'id': 'address_format', 'desc': 'Displayed slave address format',
+            'default': 'shifted', 'values': ('shifted', 'unshifted')},
+    )
+    annotations = (
+        ('start', 'Start condition'),
+        ('repeat-start', 'Repeat start condition'),
+        ('stop', 'Stop condition'),
+        ('ack', 'ACK'),
+        ('nack', 'NACK'),
+        ('bit', 'Data/address bit'),
+        ('address-read', 'Address read'),
+        ('address-write', 'Address write'),
+        ('data-read', 'Data read'),
+        ('data-write', 'Data write'),
+        ('warnings', 'Human-readable warnings'),
+    )
     annotation_rows = (
         ('bits', 'Bits', (5,)),
         ('addr-data', 'Address/Data', (0, 1, 2, 3, 4, 6, 7, 8, 9)),
@@ -107,7 +110,7 @@ class Decoder(srd.Decoder):
 
     def __init__(self, **kwargs):
         self.samplerate = None
-        self.ss = self.es = self.byte_ss = -1
+        self.ss = self.es = self.ss_byte = -1
         self.samplenum = None
         self.bitcount = 0
         self.databyte = 0
@@ -179,7 +182,7 @@ class Decoder(srd.Decoder):
 
         # Remember the start of the first data/address bit.
         if self.bitcount == 0:
-            self.byte_ss = self.samplenum
+            self.ss_byte = self.samplenum
 
         # Store individual bits and their start/end samplenumbers.
         # In the list, index 0 represents the LSB (I²C transmits MSB-first).
@@ -216,12 +219,12 @@ class Decoder(srd.Decoder):
             cmd = 'DATA READ'
             bin_class = 2
 
-        self.ss, self.es = self.byte_ss, self.samplenum + self.bitwidth
+        self.ss, self.es = self.ss_byte, self.samplenum + self.bitwidth
 
         self.putp(['BITS', self.bits])
         self.putp([cmd, d])
 
-        self.putb((bin_class, bytes([d])))
+        self.putb([bin_class, bytes([d])])
 
         for bit in self.bits:
             self.put(bit[1], bit[2], self.out_ann, [5, ['%d' % bit[0]]])
@@ -230,7 +233,7 @@ class Decoder(srd.Decoder):
             self.ss, self.es = self.samplenum, self.samplenum + self.bitwidth
             w = ['Write', 'Wr', 'W'] if self.wr else ['Read', 'Rd', 'R']
             self.putx([proto[cmd][0], w])
-            self.ss, self.es = self.byte_ss, self.samplenum
+            self.ss, self.es = self.ss_byte, self.samplenum
 
         self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d),
                    '%s: %02X' % (proto[cmd][2], d), '%02X' % d]])
@@ -253,7 +256,7 @@ class Decoder(srd.Decoder):
         # Meta bitrate
         elapsed = 1 / float(self.samplerate) * (self.samplenum - self.pdu_start + 1)
         bitrate = int(1 / elapsed * self.pdu_bits)
-        self.put(self.byte_ss, self.samplenum, self.out_bitrate, bitrate)
+        self.put(self.ss_byte, self.samplenum, self.out_bitrate, bitrate)
 
         cmd = 'STOP'
         self.ss, self.es = self.samplenum, self.samplenum
@@ -265,8 +268,8 @@ class Decoder(srd.Decoder):
         self.bits = []
 
     def decode(self, ss, es, data):
-        if self.samplerate is None:
-            raise Exception("Cannot decode without samplerate.")
+        if not self.samplerate:
+            raise SamplerateError('Cannot decode without samplerate.')
         for (self.samplenum, pins) in data:
 
             # Ignore identical samples early on (for performance reasons).
@@ -293,9 +296,6 @@ class Decoder(srd.Decoder):
             elif self.state == 'FIND ACK':
                 if self.is_data_bit(scl, sda):
                     self.get_ack(scl, sda)
-            else:
-                raise Exception('Invalid state: %s' % self.state)
 
             # Save current SDA/SCL values for the next round.
             self.oldscl, self.oldsda = scl, sda
-