X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fddc.py;h=2336159d70f84d0f12d24addbf13f6db6604ef30;hb=876f83fd3396ce581e700741e58414c2f4f6277e;hp=cdeae6dafcee752827a5fd6c2fc4e5fb44e4b948;hpb=9a12a6e7af3d7091d8e35dd1c731402cb80a01b0;p=libsigrokdecode.git
diff --git a/decoders/ddc.py b/decoders/ddc.py
index cdeae6d..2336159 100644
--- a/decoders/ddc.py
+++ b/decoders/ddc.py
@@ -16,16 +16,13 @@
## You should have received a copy of the GNU General Public License
## along with this program; if not, If not, see .
##
+"""
+This decoder extracts a DDC stream from an I2C session between a computer
+and a display device. The stream is output as plain bytes.
-#
-# DDC protocol decoder
-#
-# This decoder extracts a DDC stream from an I2C session between a computer
-# and a display device. The stream is output as plain bytes.
-#
-# Details:
-# https://en.wikipedia.org/wiki/Display_Data_Channel
-#
+Details:
+https://en.wikipedia.org/wiki/Display_Data_Channel
+"""
import sigrokdecode as srd
@@ -35,8 +32,8 @@ class Decoder(srd.Decoder):
longname = 'Display Data Channel'
desc = 'A protocol for communication between computers and displays.'
longdesc = ''
- author = 'Bert Vermeulen '
- email = ''
+ author = 'Bert Vermeulen'
+ email = 'bert@biot.com'
license = 'gplv3+'
inputs = ['i2c']
outputs = ['ddc']
@@ -52,18 +49,18 @@ class Decoder(srd.Decoder):
def start(self, metadata):
self.out_ann = self.add(srd.OUTPUT_ANN, 'ddc')
- def decode(self, start_sample, end_sample, i2c_data):
+ def decode(self, ss, es, data):
try:
- cmd, data, ack_bit = i2c_data
+ cmd, data, ack_bit = data
except Exception as e:
raise Exception('malformed I2C input: %s' % str(e)) from e
if self.state is None:
# Wait for the DDC session to start.
- if cmd in ('START', 'START_REPEAT'):
+ if cmd in ('START', 'START REPEAT'):
self.state = 'start'
elif self.state == 'start':
- if cmd == 'ADDRESS_READ' and data == 80:
+ if cmd == 'ADDRESS READ' and data == 80:
# 80 is the I2C slave address of a connected display,
# so this marks the start of the DDC data transfer.
self.state = 'transfer'
@@ -71,9 +68,8 @@ class Decoder(srd.Decoder):
# Got back to the idle state.
self.state = None
elif self.state == 'transfer':
- if cmd == 'DATA_READ':
+ if cmd == 'DATA READ':
# There shouldn't be anything but data reads on this
# address, so ignore everything else.
- self.put(start_sample, end_sample, self.out_ann,
- [0, ['0x%.2x' % data]])
+ self.put(ss, es, self.out_ann, [0, ['0x%.2x' % data]])