X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fdcf77%2Fpd.py;h=7b180ce2855f90b4e1d2de1599631d05096b5ede;hb=218b51394cd9c23a18e21815bf8ab5cd716040d3;hp=b643631081b7e1babed940146b8f87f5aa0136bb;hpb=4539e9ca58966ce3c9cad4801b16c315e86ace01;p=libsigrokdecode.git

diff --git a/decoders/dcf77/pd.py b/decoders/dcf77/pd.py
index b643631..7b180ce 100644
--- a/decoders/dcf77/pd.py
+++ b/decoders/dcf77/pd.py
@@ -65,6 +65,9 @@ class Decoder(srd.Decoder):
     )
 
     def __init__(self):
+        self.reset()
+
+    def reset(self):
         self.samplerate = None
         self.state = 'WAIT FOR RISING EDGE'
         self.ss_bit = self.ss_bit_old = self.es_bit = self.ss_block = 0
@@ -75,9 +78,6 @@ class Decoder(srd.Decoder):
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
 
-        # Assume that the initial pin state is logic 1.
-        self.initial_pins = [1]
-
     def metadata(self, key, value):
         if key == srd.SRD_CONF_SAMPLERATE:
             self.samplerate = value