X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=decoder%2Ftest%2Fpwm%2Ftest.conf;h=f3ace8ff79a2c66f1cdeff67a19bdffc76e64016;hb=c38a580b17751b725411ad9ce49db0444e166c51;hp=41f278bca61533d98fc14f44ac3dc4521b3df583;hpb=88e4cab8e0db4c93ef4b269ae8536d6674b366d7;p=sigrok-test.git diff --git a/decoder/test/pwm/test.conf b/decoder/test/pwm/test.conf index 41f278b..f3ace8f 100644 --- a/decoder/test/pwm/test.conf +++ b/decoder/test/pwm/test.conf @@ -2,3 +2,28 @@ test alsa_test_snippet protocol-decoder pwm channel data=4 input pwm/alsa_test/pwmtest_snippet.sr output pwm annotation match alsa_test_snippet.output + output pwm binary class raw match alsa_test_snippet.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_falling_ok + protocol-decoder pwm channel data=4 option polarity=active-low + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_falling_ok_initial1 + protocol-decoder pwm channel data=4 initial_pin data=1 option polarity=active-low + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok_initial1.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok_initial1.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_rising_ok + protocol-decoder pwm channel data=4 option polarity=active-high + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_rising_ok_initial0 + protocol-decoder pwm channel data=4 initial_pin data=0 option polarity=active-high + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok_initial0.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok_initial0.bin_raw