X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=Makefile.am;h=134896270c110eed95751abbd6e74ac5ae1c51c9;hb=f227338297de002d8a76dc5e411dde8743751028;hp=797166a43140d342d9e5a1accd2c822bdf7b19a2;hpb=45ec8f775680124d49e82251f258104cf4414f17;p=libsigrok.git

diff --git a/Makefile.am b/Makefile.am
index 797166a4..13489627 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -43,7 +43,7 @@ AM_CPPFLAGS = $(local_includes) $(global_defs)
 # The tests CFLAGS are a superset of the libsigrok CFLAGS, and the
 # python bindings CFLAGS are a superset of the C++ bindings CFLAGS.
 AM_CFLAGS = $(SR_EXTRA_CFLAGS) $(SR_WFLAGS) $(TESTS_CFLAGS)
-AM_CXXFLAGS = $(SR_WXXFLAGS) $(PYSIGROK_CFLAGS)
+AM_CXXFLAGS = $(SR_WXXFLAGS) $(LIBSIGROKCXX_CFLAGS)
 
 lib_LTLIBRARIES = libsigrok.la
 
@@ -73,6 +73,8 @@ libsigrok_la_SOURCES += \
 	src/input/binary.c \
 	src/input/chronovu_la8.c \
 	src/input/csv.c \
+	src/input/raw_analog.c \
+	src/input/trace32_ad.c \
 	src/input/vcd.c \
 	src/input/wav.c
 
@@ -151,7 +153,8 @@ libsigrok_la_SOURCES += \
 	src/dmm/bm25x.c \
 	src/dmm/ut71x.c \
 	src/dmm/ut372.c \
-	src/dmm/vc870.c
+	src/dmm/vc870.c \
+	src/dmm/dtm0660.c
 
 # Hardware (LCR chip parsers)
 if NEED_SERIAL
@@ -176,6 +179,12 @@ libsigrok_la_SOURCES += \
 	src/hardware/appa-55ii/protocol.c \
 	src/hardware/appa-55ii/api.c
 endif
+if HW_ARACHNID_LABS_RE_LOAD_PRO
+libsigrok_la_SOURCES += \
+	src/hardware/arachnid-labs-re-load-pro/protocol.h \
+	src/hardware/arachnid-labs-re-load-pro/protocol.c \
+	src/hardware/arachnid-labs-re-load-pro/api.c
+endif
 if HW_ASIX_SIGMA
 libsigrok_la_SOURCES += \
 	src/hardware/asix-sigma/protocol.h \
@@ -260,6 +269,12 @@ libsigrok_la_SOURCES += \
 	src/hardware/fluke-dmm/fluke.c \
 	src/hardware/fluke-dmm/api.c
 endif
+if HW_FTDI_LA
+libsigrok_la_SOURCES += \
+	src/hardware/ftdi-la/protocol.h \
+	src/hardware/ftdi-la/protocol.c \
+	src/hardware/ftdi-la/api.c
+endif
 if HW_FX2LAFW
 libsigrok_la_SOURCES += \
 	src/hardware/fx2lafw/protocol.h \
@@ -286,12 +301,24 @@ libsigrok_la_SOURCES += \
 	src/hardware/hameg-hmo/protocol.c \
 	src/hardware/hameg-hmo/api.c
 endif
+if HW_HANTEK_6XXX
+libsigrok_la_SOURCES += \
+	src/hardware/hantek-6xxx/protocol.h \
+	src/hardware/hantek-6xxx/protocol.c \
+	src/hardware/hantek-6xxx/api.c
+endif
 if HW_HANTEK_DSO
 libsigrok_la_SOURCES += \
 	src/hardware/hantek-dso/dso.h \
 	src/hardware/hantek-dso/dso.c \
 	src/hardware/hantek-dso/api.c
 endif
+if HW_HP_3457A
+libsigrok_la_SOURCES += \
+	src/hardware/hp-3457a/protocol.h \
+	src/hardware/hp-3457a/protocol.c \
+	src/hardware/hp-3457a/api.c
+endif
 if HW_HUNG_CHANG_DSO_2100
 libsigrok_la_SOURCES += \
 	src/hardware/hung-chang-dso-2100/protocol.h \
@@ -322,11 +349,11 @@ libsigrok_la_SOURCES += \
 	src/hardware/kern-scale/protocol.c \
 	src/hardware/kern-scale/api.c
 endif
-if HW_KORAD_KDXXXXP
+if HW_KORAD_KAXXXXP
 libsigrok_la_SOURCES += \
-	src/hardware/korad-kdxxxxp/protocol.h \
-	src/hardware/korad-kdxxxxp/protocol.c \
-	src/hardware/korad-kdxxxxp/api.c
+	src/hardware/korad-kaxxxxp/protocol.h \
+	src/hardware/korad-kaxxxxp/protocol.c \
+	src/hardware/korad-kaxxxxp/api.c
 endif
 if HW_LASCAR_EL_USB
 libsigrok_la_SOURCES += \
@@ -334,6 +361,12 @@ libsigrok_la_SOURCES += \
 	src/hardware/lascar-el-usb/protocol.c \
 	src/hardware/lascar-el-usb/api.c
 endif
+if HW_LECROY_LOGICSTUDIO
+libsigrok_la_SOURCES += \
+	src/hardware/lecroy-logicstudio/protocol.h \
+	src/hardware/lecroy-logicstudio/protocol.c \
+	src/hardware/lecroy-logicstudio/api.c
+endif
 if HW_MANSON_HCS_3XXX
 libsigrok_la_SOURCES += \
 	src/hardware/manson-hcs-3xxx/protocol.h \
@@ -405,6 +438,8 @@ if HW_SYSCLK_LWLA
 libsigrok_la_SOURCES += \
 	src/hardware/sysclk-lwla/lwla.h \
 	src/hardware/sysclk-lwla/lwla.c \
+	src/hardware/sysclk-lwla/lwla1016.c \
+	src/hardware/sysclk-lwla/lwla1034.c \
 	src/hardware/sysclk-lwla/protocol.h \
 	src/hardware/sysclk-lwla/protocol.c \
 	src/hardware/sysclk-lwla/api.c
@@ -598,7 +633,7 @@ PDIR = bindings/python
 PDOC_START = bindings/python/sigrok/core/doc_start.i
 PDOC_END = bindings/python/sigrok/core/doc_end.i
 
-setup_vars = VERSION='$(PACKAGE_VERSION)' CC='$(CXX)' CFLAGS='$(AM_CXXFLAGS) $(CXXFLAGS)' CXXFLAGS='$(AM_CXXFLAGS) $(CXXFLAGS)' LDADD='$(PYSIGROK_LIBS)'
+setup_vars = VERSION='$(PACKAGE_VERSION)' CC='$(CXX)' CFLAGS='$(CXXFLAGS) $(SR_WXXFLAGS) $(PYSIGROK_CFLAGS)' CXXFLAGS='$(CXXFLAGS) $(SR_WXXFLAGS) $(PYSIGROK_CFLAGS)' LDADD='$(PYSIGROK_LIBS)'
 setup_quiet = --quiet
 setup_py = $(PYTHON) $(srcdir)/$(PDIR)/setup.py $(setup_vars) $(setup_quiet)
 
@@ -643,6 +678,51 @@ CLEAN_EXTRA += python-clean
 
 endif
 
+if BINDINGS_RUBY
+
+RDIR = bindings/ruby
+RDOC = $(RDIR)/doc.i
+RWRAP = $(RDIR)/classes_wrap.cpp
+ROBJ = $(RWRAP:.cpp=.o)
+REXT = $(RDIR)/sigrok.$(RUBY_DLEXT)
+
+$(RDOC): $(srcdir)/bindings/swig/doc.py $(CPPXMLDOC)
+	$(AM_V_GEN)$(PYTHON) $(srcdir)/bindings/swig/doc.py ruby $(CPPXMLDOC) > $@
+
+$(RWRAP): $(RDIR)/classes.i $(RDOC) \
+		bindings/swig/classes.i bindings/swig/templates.i \
+		bindings/swig/enums.i
+	$(AM_V_GEN)$(SWIG) -ruby -c++ -Ibindings -Ibindings/cxx/include $(swig_defs) -o $@ $<
+
+$(ROBJ): $(RWRAP) \
+		$(library_include_HEADERS) \
+		$(nodist_library_include_HEADERS) \
+		$(bindings_cxx_libsigrokcxx_la_include_HEADERS) \
+		$(nodist_bindings_cxx_libsigrokcxx_la_include_HEADERS)
+	$(AM_V_CXX)$(CXX) $(RBSIGROK_CFLAGS) -I. -Iinclude -Ibindings/cxx/include -fPIC -o $@ -c $<
+
+$(REXT): $(ROBJ) @ORDER@ bindings/cxx/libsigrokcxx.la
+	$(AM_V_CXXLD)$(CXX) -shared -std=c++11 -o $@ $< -lsigrokcxx -Lbindings/cxx/.libs $(RBSIGROK_LIBS)
+
+ruby-build: $(REXT)
+
+ruby-install: $(REXT)
+	$(INSTALL) -d $(DESTDIR)$(prefix)/$(RBSIGROK_EXTDIR)
+	$(INSTALL) $< $(DESTDIR)$(prefix)/$(RBSIGROK_EXTDIR)
+
+ruby-clean:
+	-$(AM_V_at)rm -fr $(RDIR)/doc
+	-$(AM_V_at)rm $(REXT) $(ROBJ) $(RWRAP) $(RDOC)
+
+ruby-doc: $(RWRAP)
+	$(AM_V_at)yard doc -o $(RDIR)/doc $<
+
+BUILD_EXTRA += ruby-build
+INSTALL_EXTRA += ruby-install
+CLEAN_EXTRA += ruby-clean
+
+endif
+
 if BINDINGS_JAVA
 
 JDIR = bindings/java