X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;ds=sidebyside;f=src%2Fhardware%2Fopenbench-logic-sniffer%2Fapi.c;h=8ff1456daad47e8896fb6aaec6a1b8b387b59d94;hb=aad0c777088b7a4571272fa168a81ff9a2df05dc;hp=d15cb12cfa425e1a5664abdb6081726ef6e34652;hpb=efad7cccec8ab00043939b36de950ba2ced15f85;p=libsigrok.git diff --git a/src/hardware/openbench-logic-sniffer/api.c b/src/hardware/openbench-logic-sniffer/api.c index d15cb12c..8ff1456d 100644 --- a/src/hardware/openbench-logic-sniffer/api.c +++ b/src/hardware/openbench-logic-sniffer/api.c @@ -265,7 +265,6 @@ static int config_set(uint32_t key, GVariant *data, break; case SR_CONF_PATTERN_MODE: stropt = g_variant_get_string(data, NULL); - flag = 0xffff; if (!strcmp(stropt, STR_PATTERN_NONE)) { sr_info("Disabling test modes."); flag = 0x0000; @@ -278,10 +277,9 @@ static int config_set(uint32_t key, GVariant *data, } else { return SR_ERR; } - if (flag != 0xffff) { - devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE); - devc->flag_reg |= flag; - } + devc->flag_reg &= ~FLAG_INTERNAL_TEST_MODE; + devc->flag_reg &= ~FLAG_EXTERNAL_TEST_MODE; + devc->flag_reg |= flag; break; case SR_CONF_SWAP: if (g_variant_get_boolean(data)) { @@ -398,7 +396,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) { struct dev_context *devc; struct sr_serial_dev_inst *serial; - uint16_t samplecount, readcount, delaycount; + uint32_t samplecount, readcount, delaycount; uint8_t ols_changrp_mask, arg[4]; int num_ols_changrp; int ret, i; @@ -419,14 +417,10 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) /* * Limit readcount to prevent reading past the end of the hardware - * buffer. + * buffer. Rather read too many samples than too few. */ samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples); - readcount = samplecount / 4; - - /* Rather read too many samples than too few. */ - if (samplecount % 4 != 0) - readcount++; + readcount = (samplecount + 3) / 4; /* Basic triggers. */ if (ols_convert_trigger(sdi) != SR_OK) {