X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;ds=sidebyside;f=i2c%2Fedid%2FREADME;h=c49a9eaf6b28180bf07ee96080c1bf408e567167;hb=6030f729389379485ed264fad81e39fce08503b1;hp=52bcae96ee1cebacce1ae65206573fecd3fe6dad;hpb=4c90e08ebf8ecf6e0b21c6a24281cfdfadf566af;p=sigrok-dumps.git

diff --git a/i2c/edid/README b/i2c/edid/README
index 52bcae9..c49a9ea 100644
--- a/i2c/edid/README
+++ b/i2c/edid/README
@@ -7,7 +7,7 @@ various displays, as the EDID data was sent across the I2C bus.
 
 To decode these, set up a protocol decoder stack like this:
 
-	i2c -> ddc -> edid
+	i2c -> i2cfilter -> edid
 
 Details:
 https://en.wikipedia.org/wiki/Extended_display_identification_data
@@ -17,10 +17,10 @@ https://en.wikipedia.org/wiki/Display_Data_Channel
 samsung_le46b620r3p.sr / samsung_syncmaster245b.sr
 --------------------------------------------------
 
-The logic analyzer used was a Saleae Logic at 500kHz:
+The logic analyzer used was a Saleae Logic (at 500kHz):
 
-  Probe       I2C pins
-  --------------------
+  Probe       I2C pin
+  -------------------
   1 (black)   SDA
   2 (brown)   SCL
 
@@ -28,10 +28,10 @@ The logic analyzer used was a Saleae Logic at 500kHz:
 samsung_syncmaster203b.sr
 -------------------------
 
-The logic analyzer used was a Saleae Logic at 1MHz:
+The logic analyzer used was a Saleae Logic (at 1MHz):
 
-  Probe       I2C pins
-  --------------------
+  Probe       I2C pin
+  -------------------
   1 (black)   SCL
   2 (brown)   SDA