X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;ds=sidebyside;f=hardware%2Fsysclk-lwla%2Fprotocol.h;h=1e353ad6a36b9d4344d98c0f737da8e922ecabc7;hb=0812c40e361c9a75f3b4ef318a57ce8ba0479fa1;hp=c410e60bdb68709190d7a6393919e4085a3d694d;hpb=e6e54bd2537ac423977f5574292f2cb987ce8629;p=libsigrok.git

diff --git a/hardware/sysclk-lwla/protocol.h b/hardware/sysclk-lwla/protocol.h
index c410e60b..1e353ad6 100644
--- a/hardware/sysclk-lwla/protocol.h
+++ b/hardware/sysclk-lwla/protocol.h
@@ -20,7 +20,6 @@
 #ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
 #define LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
 
-/* Message logging helpers with subsystem-specific prefix string. */
 #define LOG_PREFIX "sysclk-lwla"
 
 #include "lwla.h"
@@ -38,16 +37,15 @@
 #define USB_INTERFACE	0
 #define USB_TIMEOUT	3000 /* ms */
 
-#define NUM_PROBES	34
-#define TRIGGER_TYPES	"01fr"
+#define NUM_CHANNELS	34
 
 /* Bit mask covering all 34 channels.
  */
-#define ALL_CHANNELS_MASK (((uint64_t)1 << NUM_PROBES) - 1)
+#define ALL_CHANNELS_MASK (((uint64_t)1 << NUM_CHANNELS) - 1)
 
 /** Unit and packet size for the sigrok logic datafeed.
  */
-#define UNIT_SIZE	((NUM_PROBES + 7) / 8)
+#define UNIT_SIZE	((NUM_CHANNELS + 7) / 8)
 #define PACKET_LENGTH	10000	/* units */
 
 /** Size of the acquisition buffer in device memory units.
@@ -101,13 +99,20 @@
  */
 #define MAX_LIMIT_MSEC		(UINT64_C(1) << 32)
 
-/** LWLA clock sources.
+/** LWLA1034 FPGA clock configurations.
+ */
+enum clock_config {
+	CONF_CLOCK_NONE,
+	CONF_CLOCK_INT,
+	CONF_CLOCK_EXT_RISE,
+	CONF_CLOCK_EXT_FALL,
+};
+
+/** Available clock sources.
  */
 enum clock_source {
-	CLOCK_SOURCE_NONE,
-	CLOCK_SOURCE_INT,
-	CLOCK_SOURCE_EXT_RISE,
-	CLOCK_SOURCE_EXT_FALL,
+	CLOCK_INTERNAL,
+	CLOCK_EXT_CLK,
 };
 
 /** Available trigger sources.
@@ -117,11 +122,11 @@ enum trigger_source {
 	TRIGGER_EXT_TRG,
 };
 
-/** Available edge choices for the external trigger.
+/** Available edge choices for the external clock and trigger inputs.
  */
-enum trigger_slope {
-	SLOPE_POSITIVE = 0,
-	SLOPE_NEGATIVE,
+enum signal_edge {
+	EDGE_POSITIVE = 0,
+	EDGE_NEGATIVE,
 };
 
 /** LWLA device states.
@@ -223,15 +228,18 @@ struct dev_context {
 
 	enum device_state state;
 
-	/** The currently configured clock source of the device. */
-	enum clock_source cur_clock_source;
-	/** The clock source selected by the user. */
-	enum clock_source selected_clock_source;
+	/** The currently active clock configuration of the device. */
+	enum clock_config cur_clock_config;
+
+	/** Clock source configuration setting. */
+	enum clock_source cfg_clock_source;
+	/** Clock edge configuration setting. */
+	enum signal_edge cfg_clock_edge;
 
 	/** Trigger source configuration setting. */
 	enum trigger_source cfg_trigger_source;
 	/** Trigger slope configuration setting. */
-	enum trigger_slope cfg_trigger_slope;
+	enum signal_edge cfg_trigger_slope;
 
 	/* Indicates that stopping the acquisition is currently in progress. */
 	gboolean stopping_in_progress;
@@ -244,7 +252,8 @@ SR_PRIV struct acquisition_state *lwla_alloc_acquisition_state(void);
 SR_PRIV void lwla_free_acquisition_state(struct acquisition_state *acq);
 
 SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi);
-SR_PRIV int lwla_set_clock_source(const struct sr_dev_inst *sdi);
+SR_PRIV int lwla_convert_trigger(const struct sr_dev_inst *sdi);
+SR_PRIV int lwla_set_clock_config(const struct sr_dev_inst *sdi);
 SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi);
 SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);
 SR_PRIV int lwla_abort_acquisition(const struct sr_dev_inst *sdi);