X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;ds=sidebyside;f=hardware%2Flink-mso19%2Fprotocol.h;h=756d625f9da1cf276c1951cecde0c47083b76e14;hb=50985c2019b2b5a6ce394589d89ee925b4f5e3a9;hp=2c603a24e95535ded292278d3819110ce2a8e70d;hpb=4b719338ccf3add3f872e8cd7549bddf818c4360;p=libsigrok.git diff --git a/hardware/link-mso19/protocol.h b/hardware/link-mso19/protocol.h index 2c603a24..756d625f 100644 --- a/hardware/link-mso19/protocol.h +++ b/hardware/link-mso19/protocol.h @@ -1,7 +1,9 @@ /* - * This file is part of the sigrok project. + * This file is part of the libsigrok project. * - * Copyright (C) 2010-2012 Bert Vermeulen + * Copyright (C) 2011 Daniel Ribeiro + * Copyright (C) 2012 Renato Caldas + * Copyright (C) 2013 Lior Elazary * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,12 +22,10 @@ #ifndef LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H #define LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H -#define USB_VENDOR "3195" -#define USB_PRODUCT "f190" - #include #include #include +#include #include "libsigrok.h" #include "libsigrok-internal.h" @@ -38,24 +38,16 @@ #define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args) #define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args) -#define NUM_PROBES 8 -#define NUM_TRIGGER_STAGES 4 -#define TRIGGER_TYPES "01" -#define SERIAL_SPEED B115200 -#define CLOCK_RATE SR_MHZ(100) -#define MIN_NUM_SAMPLES 4 - - -///* Bitmasks for CMD_FLAGS */ -//#define FLAG_DEMUX 0x01 -//#define FLAG_FILTER 0x02 -//#define FLAG_CHANNELGROUP_1 0x04 -//#define FLAG_CHANNELGROUP_2 0x08 -//#define FLAG_CHANNELGROUP_3 0x10 -//#define FLAG_CHANNELGROUP_4 0x20 -//#define FLAG_CLOCK_EXTERNAL 0x40 -//#define FLAG_CLOCK_INVERTED 0x80 -//#define FLAG_RLE 0x0100 +#define USB_VENDOR "3195" +#define USB_PRODUCT "f190" + +#define NUM_PROBES (1 + 8) +#define NUM_TRIGGER_STAGES 4 +#define TRIGGER_TYPE "01" //the first r/f is used for the whole group +#define SERIALCOMM "460800/8n1/flow=2" +#define SERIALCONN "/dev/ttyUSB0" +#define CLOCK_RATE SR_MHZ(100) +#define MIN_NUM_SAMPLES 4 #define MSO_TRIGGER_UNKNOWN '!' #define MSO_TRIGGER_UNKNOWN1 '1' @@ -65,6 +57,11 @@ #define MSO_TRIGGER_FIRED '5' #define MSO_TRIGGER_DATAREADY '6' +enum trigger_slopes { + SLOPE_POSITIVE = 0, + SLOPE_NEGATIVE, +}; + /* Structure for the pattern generator state */ struct mso_patgen { /* Pattern generator clock config */ @@ -77,7 +74,7 @@ struct mso_patgen { uint8_t config; /* Samples buffer */ uint8_t buffer[1024]; - /* Input/output configuration for the samples buffer (?)*/ + /* Input/output configuration for the samples buffer (?) */ uint8_t io[1024]; /* Number of loops for the pattern generator */ uint8_t loops; @@ -101,11 +98,13 @@ struct dev_context { uint8_t hwmodel; uint8_t hwrev; struct sr_serial_dev_inst *serial; -// uint8_t num_sample_rates; +// uint8_t num_sample_rates; /* calibration */ double vbit; uint16_t dac_offset; uint16_t offset_range; + uint64_t limit_samples; + uint64_t num_samples; /* register cache */ uint8_t ctlbase1; uint8_t ctlbase2; @@ -113,49 +112,43 @@ struct dev_context { uint8_t la_threshold; uint64_t cur_rate; uint8_t dso_probe_attn; + int8_t use_trigger; uint8_t trigger_chan; uint8_t trigger_slope; uint8_t trigger_outsrc; uint8_t trigger_state; + uint8_t trigger_holdoff[2]; uint8_t la_trigger; uint8_t la_trigger_mask; double dso_trigger_voltage; uint16_t dso_trigger_width; struct mso_prototrig protocol_trigger; - void *session_dev_id; + void *cb_data; uint16_t buffer_n; char buffer[4096]; }; SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct, - struct dev_context *ctx); -SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info); + struct dev_context *ctx); +SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, + uint8_t * info); SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi); SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val); -SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate); +SR_PRIV int mso_configure_rate(const struct sr_dev_inst *sdi, uint32_t rate); SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data); -SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi); -SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi); +SR_PRIV int mso_configure_trigger(const struct sr_dev_inst *sdi); +SR_PRIV int mso_configure_threshold_level(const struct sr_dev_inst *sdi); SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi); -SR_PRIV int mso_arm(struct sr_dev_inst *sdi); +SR_PRIV int mso_arm(const struct sr_dev_inst *sdi); SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi); -SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val); -SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate); +SR_PRIV int mso_dac_out(const struct sr_dev_inst *sdi, uint16_t val); SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc); +SR_PRIV int mso_reset_fsm(struct sr_dev_inst *sdi); +SR_PRIV int mso_toggle_led(struct sr_dev_inst *sdi, int state); +SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi); SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi); -/////////////////////// -// - -/* serial protocol */ -#define mso_trans(a, v) \ - (((v) & 0x3f) | (((v) & 0xc0) << 6) | (((a) & 0xf) << 8) | \ - ((~(v) & 0x20) << 1) | ((~(v) & 0x80) << 7)) - -SR_PRIV static const char mso_head[] = { 0x40, 0x4c, 0x44, 0x53, 0x7e }; -SR_PRIV static const char mso_foot[] = { 0x7e }; - /* bank agnostic registers */ #define REG_CTL2 15 @@ -170,20 +163,20 @@ SR_PRIV static const char mso_foot[] = { 0x7e }; #define REG_CTL1 14 /* bank 2 registers (SPI/I2C protocol trigger) */ -#define REG_PT_WORD(x) (x) -#define REG_PT_MASK(x) (x+4) -#define REG_PT_SPIMODE 8 +#define REG_PT_WORD(x) (x) +#define REG_PT_MASK(x) (x + 4) +#define REG_PT_SPIMODE 8 /* bits - REG_CTL1 */ -#define BIT_CTL1_RESETFSM (1 << 0) -#define BIT_CTL1_ARM (1 << 1) -#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */ -#define BIT_CTL1_RESETADC (1 << 6) -#define BIT_CTL1_LED (1 << 7) +#define BIT_CTL1_RESETFSM (1 << 0) +#define BIT_CTL1_ARM (1 << 1) +#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */ +#define BIT_CTL1_RESETADC (1 << 6) +#define BIT_CTL1_LED (1 << 7) /* bits - REG_CTL2 */ -#define BITS_CTL2_BANK(x) (x & 0x3) -#define BIT_CTL2_SLOWMODE (1 << 5) +#define BITS_CTL2_BANK(x) (x & 0x3) +#define BIT_CTL2_SLOWMODE (1 << 5) struct rate_map { uint32_t rate; @@ -191,31 +184,31 @@ struct rate_map { uint8_t slowmode; }; -static struct rate_map rate_map[] = { - { SR_MHZ(200), 0x0205, 0 }, - { SR_MHZ(100), 0x0105, 0 }, - { SR_MHZ(50), 0x0005, 0 }, - { SR_MHZ(20), 0x0303, 0 }, - { SR_MHZ(10), 0x0308, 0 }, - { SR_MHZ(5), 0x030c, 0 }, - { SR_MHZ(2), 0x0330, 0 }, - { SR_MHZ(1), 0x0362, 0 }, - { SR_KHZ(500), 0x03c6, 0 }, - { SR_KHZ(200), 0x07f2, 0 }, - { SR_KHZ(100), 0x0fe6, 0 }, - { SR_KHZ(50), 0x1fce, 0 }, - { SR_KHZ(20), 0x4f86, 0 }, - { SR_KHZ(10), 0x9f0e, 0 }, - { SR_KHZ(5), 0x03c7, 0x20 }, - { SR_KHZ(2), 0x07f3, 0x20 }, - { SR_KHZ(1), 0x0fe7, 0x20 }, - { 500, 0x1fcf, 0x20 }, - { 200, 0x4f87, 0x20 }, - { 100, 0x9f0f, 0x20 }, +static const struct rate_map rate_map[] = { + { SR_MHZ(200), 0x0205, 0 }, + { SR_MHZ(100), 0x0105, 0 }, + { SR_MHZ(50), 0x0005, 0 }, + { SR_MHZ(20), 0x0303, 0 }, + { SR_MHZ(10), 0x0308, 0 }, + { SR_MHZ(5), 0x030c, 0 }, + { SR_MHZ(2), 0x0330, 0 }, + { SR_MHZ(1), 0x0362, 0 }, + { SR_KHZ(500), 0x03c6, 0 }, + { SR_KHZ(200), 0x07f2, 0 }, + { SR_KHZ(100), 0x0fe6, 0 }, + { SR_KHZ(50), 0x1fce, 0 }, + { SR_KHZ(20), 0x4f86, 0 }, + { SR_KHZ(10), 0x9f0e, 0 }, + { SR_KHZ(5), 0x03c7, 0x20 }, + { SR_KHZ(2), 0x07f3, 0x20 }, + { SR_KHZ(1), 0x0fe7, 0x20 }, + { SR_HZ(500), 0x1fcf, 0x20 }, + { SR_HZ(200), 0x4f87, 0x20 }, + { SR_HZ(100), 0x9f0f, 0x20 }, }; /* FIXME: Determine corresponding voltages */ -static uint16_t la_threshold_map[] = { +static const uint16_t la_threshold_map[] = { 0x8600, 0x8770, 0x88ff, @@ -224,21 +217,4 @@ static uint16_t la_threshold_map[] = { 0x8fff, }; - -//SR_PRIV extern const char *ols_probe_names[NUM_PROBES + 1]; -// -//SR_PRIV int send_shortcommand(struct sr_serial_dev_inst *serial, -// uint8_t command); -//SR_PRIV int send_longcommand(struct sr_serial_dev_inst *serial, -// uint8_t command, uint32_t data); -//SR_PRIV int ols_configure_probes(const struct sr_dev_inst *sdi); -//SR_PRIV uint32_t reverse16(uint32_t in); -//SR_PRIV uint32_t reverse32(uint32_t in); -//SR_PRIV struct dev_context *ols_dev_new(void); -//SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial); -//SR_PRIV int ols_set_samplerate(const struct sr_dev_inst *sdi, -// uint64_t samplerate, -// const struct sr_samplerates *samplerates); -//SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data); - #endif