X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;ds=sidebyside;f=decoders%2Fuart%2Fpd.py;h=51b0504201e56e4fe883aac06baa9925fdeb83ee;hb=1078af01aeee50c9ad9633dd477e9de575521012;hp=0fa0e7ff442b8e307a883cbd9711b646be9372cd;hpb=ea36c1988829b9f8e9385ff6e5e506e3cab46877;p=libsigrokdecode.git diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py index 0fa0e7f..51b0504 100644 --- a/decoders/uart/pd.py +++ b/decoders/uart/pd.py @@ -14,8 +14,7 @@ ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## along with this program; if not, see . ## import sigrokdecode as srd @@ -200,12 +199,6 @@ class Decoder(srd.Decoder): return True return False - def reached_bit_last(self, rxtx, bitnum): - bitpos = self.frame_start[rxtx] + ((bitnum + 1) * self.bit_width) - if self.samplenum >= bitpos: - return True - return False - def wait_for_start_bit(self, rxtx, old_signal, signal): # The start bit is always 0 (low). As the idle UART (and the stop bit) # level is 1 (high), the beginning of a start bit is a falling edge. @@ -270,7 +263,11 @@ class Decoder(srd.Decoder): self.cur_data_bit[rxtx] += 1 return + # Skip to either reception of the parity bit, or reception of + # the STOP bits if parity is not applicable. self.state[rxtx] = 'GET PARITY BIT' + if self.options['parity_type'] == 'none': + self.state[rxtx] = 'GET STOP BITS' self.putpx(rxtx, ['DATA', rxtx, (self.datavalue[rxtx], self.databits[rxtx])]) @@ -329,11 +326,6 @@ class Decoder(srd.Decoder): return None def get_parity_bit(self, rxtx, signal): - # If no parity is used/configured, skip to the next state immediately. - if self.options['parity_type'] == 'none': - self.state[rxtx] = 'GET STOP BITS' - return - # Skip samples until we're in the middle of the parity bit. if not self.reached_bit(rxtx, self.options['num_data_bits'] + 1): return