X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;ds=sidebyside;f=decoders%2Fuart%2Fpd.py;h=0dd7eb031ec7c7d7358cc9e73eb3fe21f3f0b446;hb=780770f1295b7fdeb4481eb42623bad5da1e19a7;hp=8de84a4858c011bd1a696472c5056427e3d55c66;hpb=4aedd5b887ef7e34bc00c0ef76dc91ea2c443583;p=libsigrokdecode.git

diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index 8de84a4..0dd7eb0 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -78,23 +78,28 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['uart']
-    probes = []
     optional_probes = [
         # Allow specifying only one of the signals, e.g. if only one data
         # direction exists (or is relevant).
         {'id': 'rx', 'name': 'RX', 'desc': 'UART receive line'},
         {'id': 'tx', 'name': 'TX', 'desc': 'UART transmit line'},
     ]
-    options = {
-        'baudrate': ['Baud rate', 115200],
-        'num_data_bits': ['Data bits', 8], # Valid: 5-9.
-        'parity_type': ['Parity type', 'none'],
-        'parity_check': ['Check parity?', 'yes'], # TODO: Bool supported?
-        'num_stop_bits': ['Stop bit(s)', '1'], # String! 0, 0.5, 1, 1.5.
-        'bit_order': ['Bit order', 'lsb-first'],
-        'format': ['Data format', 'ascii'], # ascii/dec/hex/oct/bin
+    options = (
+        {'id': 'baudrate', 'desc': 'Baud rate', 'default': 115200},
+        {'id': 'num_data_bits', 'desc': 'Data bits', 'default': 8,
+            'values': (5, 6, 7, 8, 9)},
+        {'id': 'parity_type', 'desc': 'Parity type', 'default': 'none',
+            'values': ('none', 'odd', 'even', 'zero', 'one')},
+        {'id': 'parity_check', 'desc': 'Check parity?', 'default': 'yes',
+            'values': ('yes', 'no')},
+        {'id': 'num_stop_bits', 'desc': 'Stop bits', 'default': 1.0,
+            'values': (0.0, 0.5, 1.0, 1.5)},
+        {'id': 'bit_order', 'desc': 'Bit order', 'default': 'lsb-first',
+            'values': ('lsb-first', 'msb-first')},
+        {'id': 'format', 'desc': 'Data format', 'default': 'ascii',
+            'values': ('ascii', 'dec', 'hex', 'oct', 'bin')},
         # TODO: Options to invert the signal(s).
-    }
+    )
     annotations = [
         ['rx-data', 'RX data'],
         ['tx-data', 'TX data'],