X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;ds=sidebyside;f=decoders%2Fonewire_link%2Fpd.py;h=9503d15b93fb7c80eca3144b1728652fb3db857c;hb=e28f7aee3b96afeb543e0c3c29e3950ddd61a490;hp=ceb5da20e203f6334448e125e852ce567f302e45;hpb=b0918d40e285e7782f4e86356c41648dc748e477;p=libsigrokdecode.git

diff --git a/decoders/onewire_link/pd.py b/decoders/onewire_link/pd.py
index ceb5da2..9503d15 100644
--- a/decoders/onewire_link/pd.py
+++ b/decoders/onewire_link/pd.py
@@ -21,7 +21,7 @@
 import sigrokdecode as srd
 
 class Decoder(srd.Decoder):
-    api_version = 1
+    api_version = 2
     id = 'onewire_link'
     name = '1-Wire link layer'
     longname = '1-Wire serial communication bus (link layer)'
@@ -29,10 +29,10 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['onewire_link']
-    probes = (
+    channels = (
         {'id': 'owr', 'name': 'OWR', 'desc': '1-Wire signal line'},
     )
-    optional_probes = (
+    optional_channels = (
         {'id': 'pwr', 'name': 'PWR', 'desc': '1-Wire power supply pin'},
     )
     options = (
@@ -278,5 +278,3 @@ class Decoder(srd.Decoder):
 
                 # Wait for next slot.
                 self.state = 'WAIT FOR FALLING EDGE'
-            else:
-                raise Exception('Invalid state: %s' % self.state)