From: Diego Asanza Date: Wed, 4 May 2016 17:50:42 +0000 (+0200) Subject: dslogic: Implement acquisition with external clock. X-Git-Tag: libsigrok-0.5.0~410 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=ea3a77c756079c59db57b036b76a31460111206e;p=libsigrok.git dslogic: Implement acquisition with external clock. DSLogic hardware provides an external clock input. This commit adds support for this capability. Signed-off-by: Diego Asanza --- diff --git a/src/hardware/fx2lafw/api.c b/src/hardware/fx2lafw/api.c index 2eb5ac7c..ffb1cf1e 100644 --- a/src/hardware/fx2lafw/api.c +++ b/src/hardware/fx2lafw/api.c @@ -142,6 +142,7 @@ static const uint32_t dslogic_devopts[] = { SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, + SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET, }; static const int32_t soft_trigger_matches[] = { @@ -567,6 +568,9 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s case SR_CONF_CAPTURE_RATIO: *data = g_variant_new_uint64(devc->capture_ratio); break; + case SR_CONF_EXTERNAL_CLOCK: + *data = g_variant_new_boolean(devc->dslogic_external_clock); + break; default: return SR_ERR_NA; } @@ -632,6 +636,9 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PRO_FPGA_FIRMWARE); } break; + case SR_CONF_EXTERNAL_CLOCK: + devc->dslogic_external_clock = g_variant_get_boolean(data); + break; default: ret = SR_ERR_NA; } diff --git a/src/hardware/fx2lafw/protocol.h b/src/hardware/fx2lafw/protocol.h index 955045a6..a02c697f 100644 --- a/src/hardware/fx2lafw/protocol.h +++ b/src/hardware/fx2lafw/protocol.h @@ -135,7 +135,7 @@ struct dev_context { gboolean dslogic; uint16_t dslogic_mode; uint32_t trigger_pos; - int dslogic_external_clock; + gboolean dslogic_external_clock; int dslogic_voltage_threshold; };