From: Uwe Hermann Date: Wed, 25 Jan 2012 21:11:38 +0000 (+0100) Subject: srd: All PDs: Various fixes, cosmetics. X-Git-Tag: libsigrokdecode-0.1.0~97 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=decde15ecb51b3326b31019af61e0a729b9c61d0;p=libsigrokdecode.git srd: All PDs: Various fixes, cosmetics. - List all API methods and metadata variables in all PDs to make things easier and more consistent for new PD writers. - Fix probe assignment in a few PDs. - Raise exceptions upon invalid states of the PD state machines (bug). --- diff --git a/decoders/dcf77/dcf77.py b/decoders/dcf77/dcf77.py index b7e029d..5379592 100644 --- a/decoders/dcf77/dcf77.py +++ b/decoders/dcf77/dcf77.py @@ -57,6 +57,9 @@ class Decoder(srd.Decoder): probes = [ {'id': 'data', 'name': 'DATA', 'desc': 'DATA line'}, ] + extra_probes = [ + {'id': 'pon', 'name': 'PON', 'desc': 'TODO'}, + ] options = {} annotations = [ # ANN_ASCII @@ -211,7 +214,7 @@ class Decoder(srd.Decoder): raise Exception('Invalid DCF77 bit: %d' % c) def decode(self, ss, es, data): - for samplenum, (pon, val) in data: # FIXME + for samplenum, (val) in data: # TODO: Handle optional PON. self.samplenum += 1 # FIXME. Use samplenum. Off-by-one? @@ -272,7 +275,7 @@ class Decoder(srd.Decoder): self.state = WAIT_FOR_RISING_EDGE else: - raise Exception('Invalid state: %s' % self.state) + raise Exception('Invalid state: %d' % self.state) self.oldval = val diff --git a/decoders/ddc/ddc.py b/decoders/ddc/ddc.py index 349b2ec..f59be8e 100644 --- a/decoders/ddc/ddc.py +++ b/decoders/ddc/ddc.py @@ -38,6 +38,7 @@ class Decoder(srd.Decoder): inputs = ['i2c'] outputs = ['ddc'] probes = [] + extra_probes = [] options = {} annotations = [ ['Byte stream', 'DDC byte stream as read from display.'], @@ -49,11 +50,14 @@ class Decoder(srd.Decoder): def start(self, metadata): self.out_ann = self.add(srd.OUTPUT_ANN, 'ddc') + def report(self): + pass + def decode(self, ss, es, data): try: cmd, data, ack_bit = data except Exception as e: - raise Exception('malformed I2C input: %s' % str(e)) from e + raise Exception('Malformed I2C input: %s' % str(e)) from e if self.state is None: # Wait for the DDC session to start. @@ -72,4 +76,6 @@ class Decoder(srd.Decoder): # There shouldn't be anything but data reads on this # address, so ignore everything else. self.put(ss, es, self.out_ann, [0, ['0x%.2x' % data]]) + else: + raise Exception('Invalid state: %s' % self.state) diff --git a/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py b/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py index 1c704e3..59649fd 100644 --- a/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py +++ b/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py @@ -48,8 +48,9 @@ class Decoder(srd.Decoder): longdesc = 'TODO.' license = 'gplv2+' inputs = ['i2c'] - outputs = ['i2c-axp199', 'i2c-h8563s', 'i2c-accel'] + outputs = ['i2c-axp199', 'i2c-h8563s', 'i2c-accel'] # TODO: type vs. inst. probes = [] + extra_probes = [] options = {} annotations = [] @@ -102,4 +103,6 @@ class Decoder(srd.Decoder): print('Error: Could not determine correct stream!') # FIXME self.packets = [] self.stream = -1 + else: + pass # Do nothing, only add the I2C packet to our cache. diff --git a/decoders/i2c/i2c.py b/decoders/i2c/i2c.py index 4352c36..816fd79 100644 --- a/decoders/i2c/i2c.py +++ b/decoders/i2c/i2c.py @@ -129,6 +129,7 @@ class Decoder(srd.Decoder): {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'}, {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'}, ] + extra_probes = [] options = { 'addressing': ['Slave addressing (in bits)', 7], # 7 or 10 } @@ -158,6 +159,9 @@ class Decoder(srd.Decoder): self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2c') self.out_ann = self.add(srd.OUTPUT_ANN, 'i2c') + def report(self): + pass + def is_start_condition(self, scl, sda): # START condition (S): SDA = falling, SCL = high if (self.oldsda == 1 and sda == 0) and scl == 1: @@ -290,8 +294,7 @@ class Decoder(srd.Decoder): elif self.is_stop_condition(scl, sda): self.found_stop(scl, sda) else: - # Shouldn't happen. - raise Exception("unknown state %d" % self.STATE) + raise Exception('Invalid state %d' % self.STATE) # Save current SDA/SCL values for the next round. self.oldscl = scl diff --git a/decoders/i2cdemux/i2cdemux.py b/decoders/i2cdemux/i2cdemux.py index ff597fe..4926160 100644 --- a/decoders/i2cdemux/i2cdemux.py +++ b/decoders/i2cdemux/i2cdemux.py @@ -38,6 +38,7 @@ class Decoder(srd.Decoder): inputs = ['i2c'] outputs = [] # TODO: Only known at run-time. probes = [] + extra_probes = [] options = {} annotations = [] @@ -87,4 +88,6 @@ class Decoder(srd.Decoder): self.packets = [] self.stream = -1 + else: + pass # Do nothing, only add the I2C packet to our cache. diff --git a/decoders/mx25lxx05d/mx25lxx05d.py b/decoders/mx25lxx05d/mx25lxx05d.py index 61ec185..4139fcb 100644 --- a/decoders/mx25lxx05d/mx25lxx05d.py +++ b/decoders/mx25lxx05d/mx25lxx05d.py @@ -256,8 +256,6 @@ class Decoder(srd.Decoder): self.cmdstate = 1 else: pass # TODO - else: - pass # Handle commands. # TODO: Use some generic way to invoke the resp. method. diff --git a/decoders/nunchuk/nunchuk.py b/decoders/nunchuk/nunchuk.py index 3308bef..0f1e356 100644 --- a/decoders/nunchuk/nunchuk.py +++ b/decoders/nunchuk/nunchuk.py @@ -49,7 +49,8 @@ class Decoder(srd.Decoder): license = 'gplv2+' inputs = ['i2c'] outputs = ['nunchuck'] - probes = [] # TODO + probes = [] + extra_probes = [] # TODO options = {} annotations = [ ['TODO', 'TODO'], diff --git a/decoders/pan1321/pan1321.py b/decoders/pan1321/pan1321.py index 2c86449..f383e00 100644 --- a/decoders/pan1321/pan1321.py +++ b/decoders/pan1321/pan1321.py @@ -47,6 +47,7 @@ class Decoder(srd.Decoder): inputs = ['uart'] outputs = ['pan1321'] probes = [] + extra_probes = [] options = {} annotations = [ ['ASCII', 'TODO: description'], @@ -73,7 +74,7 @@ class Decoder(srd.Decoder): [ANN_ASCII, ['Host set the Bluetooth name to ' + name]]) else: self.put(ss, es, self.out_ann, - [ANN_ASCII, ['Host sent unsupported command']]) + [ANN_ASCII, ['Host sent unsupported command: %s' % s]]) self.cmd[rxtx] = '' def handle_device_reply(self, ss, es, rxtx, s): @@ -89,7 +90,7 @@ class Decoder(srd.Decoder): [ANN_ASCII, ['Device sent error code ' + error]]) else: self.put(ss, es, self.out_ann, - [ANN_ASCII, ['Device sent an unknown reply']]) + [ANN_ASCII, ['Device sent an unknown reply: %s' % s]]) self.cmd[rxtx] = '' def decode(self, ss, es, data): @@ -112,5 +113,5 @@ class Decoder(srd.Decoder): elif rxtx == TX: self.handle_host_command(ss, es, rxtx, self.cmd[rxtx]) else: - pass # TODO: Error. + raise Exception('Invalid rxtx value: %d' % rxtx) diff --git a/decoders/rtc8564/rtc8564.py b/decoders/rtc8564/rtc8564.py index 0e7a532..97b0808 100644 --- a/decoders/rtc8564/rtc8564.py +++ b/decoders/rtc8564/rtc8564.py @@ -223,6 +223,5 @@ class Decoder(srd.Decoder): else: pass # TODO? else: - # Shouldn't happen. - raise Exception('Unknown state: %d', self.state) + raise Exception('Invalid state: %d' % self.state) diff --git a/decoders/spi/spi.py b/decoders/spi/spi.py index 57f5562..7789e34 100644 --- a/decoders/spi/spi.py +++ b/decoders/spi/spi.py @@ -59,13 +59,14 @@ class Decoder(srd.Decoder): inputs = ['logic'] outputs = ['spi'] probes = [ - {'id': 'mosi', 'name': 'MOSI', - 'desc': 'SPI MOSI line (Master out, slave in)'}, {'id': 'miso', 'name': 'MISO', 'desc': 'SPI MISO line (Master in, slave out)'}, + {'id': 'mosi', 'name': 'MOSI', + 'desc': 'SPI MOSI line (Master out, slave in)'}, {'id': 'sck', 'name': 'CLK', 'desc': 'SPI clock line'}, {'id': 'cs', 'name': 'CS#', 'desc': 'SPI CS (chip select) line'}, ] + extra_probes = [] # TODO options = { 'cs_polarity': ['CS# polarity', ACTIVE_LOW], 'cpol': ['Clock polarity', CPOL_0], @@ -94,11 +95,8 @@ class Decoder(srd.Decoder): return 'SPI: %d bytes received' % self.bytesreceived def decode(self, ss, es, data): - # HACK! At the moment the number of probes is not handled correctly. - # E.g. if an input file (-i foo.sr) has more than two probes enabled. - # for (samplenum, (mosi, sck, x, y, z, a)) in data: - # for (samplenum, (cs, miso, sck, mosi, wp, hold)) in data: - for (samplenum, (cs, miso, sck, mosi, wp, hold)) in data: + # TODO: Either MISO or MOSI could be optional. CS# is optional. + for (samplenum, (miso, mosi, sck, cs)) in data: self.samplenum += 1 # FIXME diff --git a/decoders/transitioncounter/transitioncounter.py b/decoders/transitioncounter/transitioncounter.py index 9cf1918..86bbfbe 100644 --- a/decoders/transitioncounter/transitioncounter.py +++ b/decoders/transitioncounter/transitioncounter.py @@ -31,6 +31,7 @@ class Decoder(srd.Decoder): inputs = ['logic'] outputs = ['transitioncounts'] probes = [] + extra_probes = [] options = {} annotations = [ ['TODO', 'TODO'], diff --git a/decoders/uart/uart.py b/decoders/uart/uart.py index f827a22..a0f915c 100644 --- a/decoders/uart/uart.py +++ b/decoders/uart/uart.py @@ -199,6 +199,7 @@ class Decoder(srd.Decoder): {'id': 'rx', 'name': 'RX', 'desc': 'UART receive line'}, {'id': 'tx', 'name': 'TX', 'desc': 'UART transmit line'}, ] + extra_probes = [] options = { 'baudrate': ['Baud rate', 115200], 'num_data_bits': ['Data bits', 8], # Valid: 5-9. @@ -391,7 +392,8 @@ class Decoder(srd.Decoder): self.put(self.samplenum, self.samplenum, self.out_ann, [ANN_ASCII, ['Stop bit', 'Stop', 'P']]) - def decode(self, ss, es, data): # TODO + def decode(self, ss, es, data): + # TODO: Either RX or TX could be omitted (optional probe). for (samplenum, (rx, tx)) in data: # TODO: Start counting at 0 or 1? Increase before or after? @@ -420,7 +422,7 @@ class Decoder(srd.Decoder): elif self.state[rxtx] == GET_STOP_BITS: self.get_stop_bits(rxtx, signal) else: - raise Exception('Invalid state: %s' % self.state[rxtx]) + raise Exception('Invalid state: %d' % self.state[rxtx]) # Save current RX/TX values for the next round. self.oldbit[rxtx] = signal diff --git a/decoders/usb/usb.py b/decoders/usb/usb.py index 2df03c0..6441526 100644 --- a/decoders/usb/usb.py +++ b/decoders/usb/usb.py @@ -118,6 +118,7 @@ class Decoder(srd.Decoder): {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'}, {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'}, ] + extra_probes = [] options = {} annotations = [ ['TODO', 'TODO'] @@ -133,17 +134,18 @@ class Decoder(srd.Decoder): self.out_ann = self.add(srd.OUTPUT_ANN, 'usb') if self.rate < 48000000: - raise Exception('Sample rate not sufficient for USB decoding') + raise Exception('Sample rate (%d) not sufficient for USB ' + 'decoding, need at least 48MHz' % self.rate) # Initialise decoder state. self.sym = J self.scount = 0 self.packet = '' - def decode(self, ss, es, data): + def report(self): + pass - # FIXME - # for (samplenum, (dp, dm, x, y, z, a)) in data: + def decode(self, ss, es, data): for (samplenum, (dm, dp)) in data: self.scount += 1