From: Uwe Hermann <redacted>
Date: Fri, 18 May 2012 19:42:29 +0000 (+0200)
Subject: srd: MX25Lxx05D: Fix inverted SRWD bit handling.
X-Git-Tag: libsigrokdecode-0.1.1~111
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=cd287c56af4e005e36faa26a88f6ef6dcbb2c902;p=libsigrokdecode.git

srd: MX25Lxx05D: Fix inverted SRWD bit handling.
---

diff --git a/decoders/mx25lxx05d/mx25lxx05d.py b/decoders/mx25lxx05d/mx25lxx05d.py
index a5dab2e..1d41fd4 100644
--- a/decoders/mx25lxx05d/mx25lxx05d.py
+++ b/decoders/mx25lxx05d/mx25lxx05d.py
@@ -113,7 +113,7 @@ def decode_status_reg(data):
     ret += 'Device is %sin continuously program mode (CP mode).\n' % s
 
     # Bits[7:7]: SRWD (status register write disable)
-    s = '' if (data & (1 << 7)) else 'not '
+    s = 'not ' if (data & (1 << 7)) else ''
     ret += 'Status register writes are %sallowed.\n' % s
 
     return ret