From: Uwe Hermann Date: Thu, 19 Jan 2012 12:47:13 +0000 (+0100) Subject: I2C dump on a GIGABYTE 6VLE-VXL mainboard. X-Git-Tag: sigrok-dumps-0.1.0~27 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=c83a7da3a95d3e9b5ead986ac16e2d5d941ce952;p=sigrok-dumps.git I2C dump on a GIGABYTE 6VLE-VXL mainboard. --- diff --git a/i2c/gigabyte_6vle-vxl_i2c/README b/i2c/gigabyte_6vle-vxl_i2c/README new file mode 100644 index 0000000..75abedd --- /dev/null +++ b/i2c/gigabyte_6vle-vxl_i2c/README @@ -0,0 +1,39 @@ +------------------------------------------------------------------------------- +GIGABYTE 6VLE-VXL I2C data +------------------------------------------------------------------------------- + +This is an example capture of I2C traffic on a DDR SDRAM's EEPROM chip, for +Serial Presence Detect (SPD) data. The 512MB DDR RAM module was inserted +in a GIGABYTE 6VLE-VXL mainboard. After the capture was started, the board +was powered-on, thus the captured data corresponds to the BIOS code which +reads the RAM module's EEPROM contents (in order to properly initialize +the RAM). + +Additionally, it turned out that on the same I2C bus, there is an additional +I2C device, the ICS950908 "Programmable Timing Control Hub for P4" (a clock +generation chip). The capture also contains the I2C-based configuration of +that chip by the BIOS. + +Details: +https://en.wikipedia.org/wiki/Serial_presence_detect +http://pdf1.alldatasheet.com/datasheet-pdf/view/90645/ICST/ICS950908.html + + +Logic analyzer setup +-------------------- + +The logic analyzer used for capturing was a Saleae Logic: + + Probe I2C pin + ------------------- + 1 (black) SCL + 4 (orange) SDA + + +Data +---- + +The sigrok command line used was: + + sigrok-cli -d 0:samplerate=2mhz --time 10s -o + diff --git a/i2c/gigabyte_6vle-vxl_i2c/gigabyte_6vle_vxl_i2c.sr b/i2c/gigabyte_6vle-vxl_i2c/gigabyte_6vle_vxl_i2c.sr new file mode 100644 index 0000000..0fe63de Binary files /dev/null and b/i2c/gigabyte_6vle-vxl_i2c/gigabyte_6vle_vxl_i2c.sr differ