From: Uwe Hermann <redacted>
Date: Sat, 24 Sep 2016 10:22:57 +0000 (+0200)
Subject: uart: Fix a bug in the output for stacked PDs.
X-Git-Tag: libsigrokdecode-0.5.0~146
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=c1fc50b1256dba3bfad7e769691f11b729601b28;p=libsigrokdecode.git

uart: Fix a bug in the output for stacked PDs.

The UART bit information was not transmitted correctly to stacked PDs
if there was an overlap between RX and TX bytes in the data.
---

diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index 0e6e548..151cae4 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -288,7 +288,7 @@ class Decoder(srd.Decoder):
         self.putbin(rxtx, [rxtx, bytes([b])])
         self.putbin(rxtx, [2, bytes([b])])
 
-        self.databits = [[], []]
+        self.databits[rxtx] = []
 
     def get_parity_bit(self, rxtx, signal):
         # If no parity is used/configured, skip to the next state immediately.