From: Soeren Apel <redacted>
Date: Fri, 26 Jun 2020 18:16:15 +0000 (+0200)
Subject: Rename logic_class to logic_group and output as group-wise RLE
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=b8c8dc8a649ad0a76bccbfae7198cc9c8cb2ccda;p=libsigrokdecode.git

Rename logic_class to logic_group and output as group-wise RLE
---

diff --git a/decoders/pca9571/pd.py b/decoders/pca9571/pd.py
index af0ad2d..a878142 100644
--- a/decoders/pca9571/pd.py
+++ b/decoders/pca9571/pd.py
@@ -56,24 +56,23 @@ class Decoder(srd.Decoder):
     def reset(self):
         self.state = 'IDLE'
         self.last_write = 0xFF # Chip port default state is high.
-
-        self.logic_es = 1
-        self.logic_data = []
-        for i in range(NUM_OUTPUT_CHANNELS):
-            self.logic_data.append(bytes([1]))
+        self.last_write_es = 0
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
         self.out_logic = self.register(srd.OUTPUT_LOGIC)
 
+#    def flush(self):
+#        self.put_logic_states()
+
     def putx(self, data):
         self.put(self.ss, self.es, self.out_ann, data)
 
     def put_logic_states(self):
-        if (self.es > self.logic_es):
-            for i in range(NUM_OUTPUT_CHANNELS):
-                self.put(self.logic_es, self.es, self.out_logic, [i, self.logic_data[i]])
-            self.logic_es = self.es
+        if (self.es > self.last_write_es):
+            data = bytes([self.last_write])
+            self.put(self.last_write_es, self.es, self.out_logic, [0, data])
+            self.last_write_es = self.es
 
     def handle_io(self, b):
         if self.state == 'READ DATA':
@@ -83,14 +82,12 @@ class Decoder(srd.Decoder):
                                '(%02X) are different' % self.last_write]])
         else:
             operation = ['Outputs set', 'W']
+#            self.put_logic_states()
             self.last_write = b
+
         self.putx([1, [operation[0] + ': %02X' % b,
                        operation[1] + ': %02X' % b]])
 
-        for i in range(NUM_OUTPUT_CHANNELS):
-            bit = (b & (1 << i)) != 0
-            self.logic_data[i] = bytes([bit])
-
     def check_correct_chip(self, addr):
         if addr != 0x25:
             self.putx([2, ['Warning: I²C slave 0x%02X not a PCA9571 '
diff --git a/decoders/tca6408a/pd.py b/decoders/tca6408a/pd.py
index 01c4e6d..0d63cc3 100644
--- a/decoders/tca6408a/pd.py
+++ b/decoders/tca6408a/pd.py
@@ -57,10 +57,8 @@ class Decoder(srd.Decoder):
         self.state = 'IDLE'
         self.chip = -1
 
-        self.logic_es = 1
-        self.logic_data = []
-        for i in range(NUM_OUTPUT_CHANNELS):
-            self.logic_data.append(bytes([1]))
+        self.logic_output_es = 0
+        self.logic_value = 0
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
@@ -70,10 +68,10 @@ class Decoder(srd.Decoder):
         self.put(self.ss, self.es, self.out_ann, data)
 
     def put_logic_states(self):
-        if (self.es > self.logic_es):
-            for i in range(NUM_OUTPUT_CHANNELS):
-                self.put(self.logic_es, self.es, self.out_logic, [i, self.logic_data[i]])
-            self.logic_es = self.es
+        if (self.es > self.logic_output_es):
+            data = bytes([self.logic_value])
+            self.put(self.logic_output_es, self.es, self.out_logic, [0, data])
+            self.logic_output_es = self.es
 
     def handle_reg_0x00(self, b):
         self.putx([1, ['State of inputs: %02X' % b]])
@@ -81,9 +79,7 @@ class Decoder(srd.Decoder):
 
     def handle_reg_0x01(self, b):
         self.putx([1, ['Outputs set: %02X' % b]])
-        for i in range(NUM_OUTPUT_CHANNELS):
-            bit = (b & (1 << i)) != 0
-            self.logic_data[i] = bytes([bit])
+        self.logic_value = b
 
     def handle_reg_0x02(self, b):
         self.putx([1, ['Polarity inverted: %02X' % b]])
diff --git a/libsigrokdecode.h b/libsigrokdecode.h
index 30282f5..0870276 100644
--- a/libsigrokdecode.h
+++ b/libsigrokdecode.h
@@ -326,9 +326,9 @@ struct srd_proto_data_binary {
 	const unsigned char *data;
 };
 struct srd_proto_data_logic {
-	int logic_class;
-	uint64_t size;
-	const unsigned char *data;
+	int logic_group;
+	uint64_t repeat_count; /* Number of times the value in data was repeated. */
+	const unsigned char *data; /* Bitfield containing the states of the logic outputs */
 };
 
 typedef void (*srd_pd_output_callback)(struct srd_proto_data *pdata,
diff --git a/type_decoder.c b/type_decoder.c
index ab2e21f..9508183 100644
--- a/type_decoder.c
+++ b/type_decoder.c
@@ -137,13 +137,13 @@ static int convert_logic(struct srd_decoder_inst *di, PyObject *obj,
 	struct srd_proto_data_logic *pdl;
 	PyObject *py_tmp;
 	Py_ssize_t size;
-	int logic_class;
-	char *class_name, *buf;
+	int logic_group;
+	char *group_name, *buf;
 	PyGILState_STATE gstate;
 
 	gstate = PyGILState_Ensure();
 
-	/* Should be a list of [logic class, bytes]. */
+	/* Should be a list of [logic group, bytes]. */
 	if (!PyList_Check(obj)) {
 		srd_err("Protocol decoder %s submitted non-list for SRD_OUTPUT_LOGIC.",
 			di->decoder->name);
@@ -165,10 +165,10 @@ static int convert_logic(struct srd_decoder_inst *di, PyObject *obj,
 			"but first element was not an integer.", di->decoder->name);
 		goto err;
 	}
-	logic_class = PyLong_AsLong(py_tmp);
-	if (!(class_name = g_slist_nth_data(di->decoder->logic_output_channels, logic_class))) {
+	logic_group = PyLong_AsLong(py_tmp);
+	if (!(group_name = g_slist_nth_data(di->decoder->logic_output_channels, logic_group))) {
 		srd_err("Protocol decoder %s submitted SRD_OUTPUT_LOGIC with "
-			"unregistered logic class %d.", di->decoder->name, logic_class);
+			"unregistered logic group %d.", di->decoder->name, logic_group);
 		goto err;
 	}
 
@@ -193,11 +193,11 @@ static int convert_logic(struct srd_decoder_inst *di, PyObject *obj,
 	PyGILState_Release(gstate);
 
 	pdl = pdata->data;
-	pdl->logic_class = logic_class;
-	pdl->size = size;
-	if (!(pdl->data = g_try_malloc(pdl->size)))
+	pdl->logic_group = logic_group;
+	/* pdl->repeat_count is set by the caller as it depends on the sample range */
+	if (!(pdl->data = g_try_malloc(size)))
 		return SRD_ERR_MALLOC;
-	memcpy((void *)pdl->data, (const void *)buf, pdl->size);
+	memcpy((void *)pdl->data, (const void *)buf, size);
 
 	return SRD_OK;
 
@@ -405,6 +405,7 @@ static PyObject *Decoder_put(PyObject *self, PyObject *args)
 	struct srd_proto_data pdata;
 	struct srd_proto_data_annotation pda;
 	struct srd_proto_data_binary pdb;
+	struct srd_proto_data_logic pdl;
 	uint64_t start_sample, end_sample;
 	int output_id;
 	struct srd_pd_callback *cb;
@@ -507,12 +508,17 @@ static PyObject *Decoder_put(PyObject *self, PyObject *args)
 		break;
 	case SRD_OUTPUT_LOGIC:
 		if ((cb = srd_pd_output_callback_find(di->sess, pdo->output_type))) {
-			pdata.data = &pdb;
+			pdata.data = &pdl;
 			/* Convert from PyDict to srd_proto_data_logic. */
 			if (convert_logic(di, py_data, &pdata) != SRD_OK) {
 				/* An error was already logged. */
 				break;
 			}
+			if (end_sample <= start_sample) {
+				srd_err("Ignored SRD_OUTPUT_LOGIC with invalid sample range.");
+				break;
+			}
+			pdl.repeat_count = (end_sample - start_sample) - 1;
 			Py_BEGIN_ALLOW_THREADS
 			cb->cb(&pdata, cb->cb_data);
 			Py_END_ALLOW_THREADS