From: Aurelien Jacobs <redacted>
Date: Sat, 25 Jun 2016 16:19:47 +0000 (+0200)
Subject: rigol-ds: add support for getting/setting trigger level.
X-Git-Tag: libsigrok-0.5.0~300
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=9ea62f2e0ac1ae9ee01215148177ae4e6f344078;p=libsigrok.git

rigol-ds: add support for getting/setting trigger level.
---

diff --git a/include/libsigrok/libsigrok.h b/include/libsigrok/libsigrok.h
index b533d87d..511ab28c 100644
--- a/include/libsigrok/libsigrok.h
+++ b/include/libsigrok/libsigrok.h
@@ -964,6 +964,9 @@ enum sr_configkey {
 	/** Under-voltage condition active. */
 	SR_CONF_UNDER_VOLTAGE_CONDITION_ACTIVE,
 
+	/** Trigger level. */
+	SR_CONF_TRIGGER_LEVEL,
+
 	/* Update sr_key_info_config[] (hwdriver.c) upon changes! */
 
 	/*--- Special stuff -------------------------------------------------*/
diff --git a/src/hardware/rigol-ds/api.c b/src/hardware/rigol-ds/api.c
index d21cff7d..698a692f 100644
--- a/src/hardware/rigol-ds/api.c
+++ b/src/hardware/rigol-ds/api.c
@@ -43,6 +43,7 @@ static const uint32_t devopts[] = {
 	SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 	SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 	SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+	SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
 	SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
 	SR_CONF_NUM_HDIV | SR_CONF_GET,
 	SR_CONF_SAMPLERATE | SR_CONF_GET,
@@ -588,6 +589,9 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s
 		}
 		*data = g_variant_new_string(tmp_str);
 		break;
+	case SR_CONF_TRIGGER_LEVEL:
+		*data = g_variant_new_double(devc->trigger_level);
+		break;
 	case SR_CONF_TIMEBASE:
 		for (i = 0; i < devc->num_timebases; i++) {
 			float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
@@ -697,6 +701,13 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd
 		g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
 		ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
 		break;
+	case SR_CONF_TRIGGER_LEVEL:
+		t_dbl = g_variant_get_double(data);
+		g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
+		ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
+		if (ret == SR_OK)
+			devc->trigger_level = t_dbl;
+		break;
 	case SR_CONF_TIMEBASE:
 		g_variant_get(data, "(tt)", &p, &q);
 		for (i = 0; i < devc->num_timebases; i++) {
diff --git a/src/hardware/rigol-ds/protocol.c b/src/hardware/rigol-ds/protocol.c
index 0a60957c..d9d8dc7e 100644
--- a/src/hardware/rigol-ds/protocol.c
+++ b/src/hardware/rigol-ds/protocol.c
@@ -856,6 +856,11 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 		return SR_ERR;
 	sr_dbg("Current trigger slope %s", devc->trigger_slope);
 
+	/* Trigger level. */
+	if (sr_scpi_get_float(sdi->conn, ":TRIG:EDGE:LEV?", &devc->trigger_level) != SR_OK)
+		return SR_ERR;
+	sr_dbg("Current trigger level %g", devc->trigger_level);
+
 	return SR_OK;
 }
 
diff --git a/src/hardware/rigol-ds/protocol.h b/src/hardware/rigol-ds/protocol.h
index cdf43f8b..e7779704 100644
--- a/src/hardware/rigol-ds/protocol.h
+++ b/src/hardware/rigol-ds/protocol.h
@@ -124,6 +124,7 @@ struct dev_context {
 	char *trigger_source;
 	float horiz_triggerpos;
 	char *trigger_slope;
+	float trigger_level;
 	char *coupling[MAX_ANALOG_CHANNELS];
 
 	/* Operational state */
diff --git a/src/hwdriver.c b/src/hwdriver.c
index 6758f6a9..c23e761a 100644
--- a/src/hwdriver.c
+++ b/src/hwdriver.c
@@ -175,6 +175,8 @@ static struct sr_key_info sr_key_info_config[] = {
 		"Under-voltage condition", NULL},
 	{SR_CONF_UNDER_VOLTAGE_CONDITION_ACTIVE, SR_T_BOOL, "uvc_active",
 		"Under-voltage condition active", NULL},
+	{SR_CONF_TRIGGER_LEVEL, SR_T_FLOAT, "triggerlevel",
+		"Trigger level", NULL},
 
 	/* Special stuff */
 	{SR_CONF_SESSIONFILE, SR_T_STRING, "sessionfile",