From: Uwe Hermann <redacted>
Date: Tue, 10 Jan 2012 19:03:45 +0000 (+0100)
Subject: Move DCF77 files to pollin_dcf1_module/ subdir.
X-Git-Tag: sigrok-dumps-0.1.0~38
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=940bdad74dd3dd6f0e2fba4a97efbd60bcfe14e2;p=libsigrokdecode.git

Move DCF77 files to pollin_dcf1_module/ subdir.
---

diff --git a/dcf77/README b/dcf77/README
deleted file mode 100644
index 0718715..0000000
--- a/dcf77/README
+++ /dev/null
@@ -1,35 +0,0 @@
--------------------------------------------------------------------------------
-DCF77
--------------------------------------------------------------------------------
-
-This is a set of example captures of a DCF77 signal.
-
-Details:
-http://en.wikipedia.org/wiki/DCF77
-TODO
-
-
-Logic analyzer setup
---------------------
-
-The logic analyzer used for capturing was a Saleae Logic.
-
-The logic analyzer probes were connected like this:
-
-  Probe       DCF77 module
-  ------------------------
-  1 (black)   PON
-  2 (brown)   DATA
-  GND         GND
-
-
-Data
-----
-
-The sigrok command line used was:
-
-  sigrok-cli -d 0:samplerate=1mhz --time 1800s \
-             -p '1=PON,2=DATA' -o dcf77_1800s.sr
-
-The time and samplerate varies, depending on the file.
-
diff --git a/dcf77/dcf77_120s.sr b/dcf77/dcf77_120s.sr
deleted file mode 100644
index 945c20d..0000000
Binary files a/dcf77/dcf77_120s.sr and /dev/null differ
diff --git a/dcf77/dcf77_1800s.sr b/dcf77/dcf77_1800s.sr
deleted file mode 100644
index 09d9f36..0000000
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diff --git a/dcf77/dcf77_20s.sr b/dcf77/dcf77_20s.sr
deleted file mode 100644
index 9f141fc..0000000
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diff --git a/dcf77/dcf77_480s.sr b/dcf77/dcf77_480s.sr
deleted file mode 100644
index 8a79890..0000000
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diff --git a/dcf77/dcf77_480s_interrupted.sr b/dcf77/dcf77_480s_interrupted.sr
deleted file mode 100644
index d5c6f44..0000000
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diff --git a/dcf77/pollin_dcf1_module/README b/dcf77/pollin_dcf1_module/README
new file mode 100644
index 0000000..0718715
--- /dev/null
+++ b/dcf77/pollin_dcf1_module/README
@@ -0,0 +1,35 @@
+-------------------------------------------------------------------------------
+DCF77
+-------------------------------------------------------------------------------
+
+This is a set of example captures of a DCF77 signal.
+
+Details:
+http://en.wikipedia.org/wiki/DCF77
+TODO
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used for capturing was a Saleae Logic.
+
+The logic analyzer probes were connected like this:
+
+  Probe       DCF77 module
+  ------------------------
+  1 (black)   PON
+  2 (brown)   DATA
+  GND         GND
+
+
+Data
+----
+
+The sigrok command line used was:
+
+  sigrok-cli -d 0:samplerate=1mhz --time 1800s \
+             -p '1=PON,2=DATA' -o dcf77_1800s.sr
+
+The time and samplerate varies, depending on the file.
+
diff --git a/dcf77/pollin_dcf1_module/dcf77_120s.sr b/dcf77/pollin_dcf1_module/dcf77_120s.sr
new file mode 100644
index 0000000..945c20d
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diff --git a/dcf77/pollin_dcf1_module/dcf77_1800s.sr b/dcf77/pollin_dcf1_module/dcf77_1800s.sr
new file mode 100644
index 0000000..09d9f36
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diff --git a/dcf77/pollin_dcf1_module/dcf77_20s.sr b/dcf77/pollin_dcf1_module/dcf77_20s.sr
new file mode 100644
index 0000000..9f141fc
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diff --git a/dcf77/pollin_dcf1_module/dcf77_480s.sr b/dcf77/pollin_dcf1_module/dcf77_480s.sr
new file mode 100644
index 0000000..8a79890
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diff --git a/dcf77/pollin_dcf1_module/dcf77_480s_interrupted.sr b/dcf77/pollin_dcf1_module/dcf77_480s_interrupted.sr
new file mode 100644
index 0000000..d5c6f44
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