From: Gerhard Sittig <redacted>
Date: Thu, 25 May 2017 19:57:30 +0000 (+0200)
Subject: asix-sigma: Fix a register addressing bug (non-issue)
X-Git-Tag: libsigrok-0.5.0~41
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=84a6ed1a126e0877a4166c2aa7d40f409180fdde;p=libsigrok.git

asix-sigma: Fix a register addressing bug (non-issue)

Fix how the READ_ID register index was passed to the hardware access.
Addresses are sent in nibbles, so shift by eight is wrong here. No harm
was done, as the register's index is zero.
---

diff --git a/src/hardware/asix-sigma/protocol.c b/src/hardware/asix-sigma/protocol.c
index 253e98a0..05709c1d 100644
--- a/src/hardware/asix-sigma/protocol.c
+++ b/src/hardware/asix-sigma/protocol.c
@@ -330,7 +330,7 @@ static int sigma_fpga_init_la(struct dev_context *devc)
 	/* Initialize the logic analyzer mode. */
 	uint8_t logic_mode_start[] = {
 		REG_ADDR_LOW  | (READ_ID & 0xf),
-		REG_ADDR_HIGH | (READ_ID >> 8),
+		REG_ADDR_HIGH | (READ_ID >> 4),
 		REG_READ_ADDR,	/* Read ID register. */
 
 		REG_ADDR_LOW | (WRITE_TEST & 0xf),