From: Gerhard Sittig <redacted>
Date: Sun, 18 Jun 2017 11:50:48 +0000 (+0200)
Subject: pwm: Fixup sample numbers for binary output
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=73dc48310c47f4e3ebb6ee6de67983603ddd3ea3;p=libsigrokdecode.git

pwm: Fixup sample numbers for binary output

Do reference the period's start and end sample numbers when the
duty cycle is written to the binary output stream. The previous
implementation inappropriately used the period counter instead.
---

diff --git a/decoders/pwm/pd.py b/decoders/pwm/pd.py
index d6411ae..0cd0a54 100644
--- a/decoders/pwm/pd.py
+++ b/decoders/pwm/pd.py
@@ -50,7 +50,6 @@ class Decoder(srd.Decoder):
 
     def __init__(self):
         self.ss_block = self.es_block = None
-        self.num_cycles = 0
 
     def metadata(self, key, value):
         if key == srd.SRD_CONF_SAMPLERATE:
@@ -84,13 +83,10 @@ class Decoder(srd.Decoder):
         self.put(self.ss_block, self.es_block, self.out_ann, [1, [period_s]])
 
     def putb(self, data):
-        # TODO Are these ss/es specs appropriate? It's the same value,
-        # which represents a mere period counter, not sample numbers.
-        # Probably should be:
-        # self.put(self.ss_block, self.es_block, self.out_binary, data)
-        self.put(self.num_cycles, self.num_cycles, self.out_binary, data)
+        self.put(self.ss_block, self.es_block, self.out_binary, data)
 
     def decode(self):
+        num_cycles = 0
         average = 0
 
         # Wait for an "active" edge (depends on config). This starts
@@ -128,7 +124,7 @@ class Decoder(srd.Decoder):
             self.putp(period_t)
 
             # Update and report the new duty cycle average.
-            self.num_cycles += 1
+            num_cycles += 1
             average += percent
             self.put(self.first_samplenum, self.es_block, self.out_average,
-                     float(average / self.num_cycles))
+                     float(average / num_cycles))