From: Piotr Esden-Tempski Date: Fri, 13 Apr 2018 00:24:35 +0000 (-0700) Subject: Minor value adjustment. X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=702dee40d28ad8cd866b9e3c4412e0d955e3de24;p=fx2grok.git Minor value adjustment. --- diff --git a/hardware/fx2grok-flat/0.2/fx2grok-flat-cache.lib b/hardware/fx2grok-flat/0.2/fx2grok-flat-cache.lib index 43977e6..e933dba 100644 --- a/hardware/fx2grok-flat/0.2/fx2grok-flat-cache.lib +++ b/hardware/fx2grok-flat/0.2/fx2grok-flat-cache.lib @@ -1,463 +1,4 @@ -EESchema-LIBRARY Version 2.3 +EESchema-LIBRARY Version 2.4 #encoding utf-8 # -# +3V3 -# -DEF +3V3 #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -150 50 H I C CNN -F1 "+3V3" 0 140 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -ALIAS +3.3V -DRAW -P 2 0 1 0 -30 50 0 100 N -P 2 0 1 0 0 0 0 100 N -P 2 0 1 0 0 100 30 50 N -X +3V3 1 0 0 0 U 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# +5V -# -DEF +5V #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -150 50 H I C CNN -F1 "+5V" 0 140 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -P 2 0 1 0 -30 50 0 100 N -P 2 0 1 0 0 0 0 100 N -P 2 0 1 0 0 100 30 50 N -X +5V 1 0 0 0 U 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# CY7C68013A-56 -# -DEF CY7C68013A-56 IC 0 40 Y Y 1 F N -F0 "IC" 0 -1700 60 H V C CNN -F1 "CY7C68013A-56" 0 0 60 H V C CNN -F2 "" 0 0 60 H I C CNN -F3 "" 0 0 60 H I C CNN -DRAW -S -1100 1400 1000 -1300 0 1 0 N -X RDY0/SLRD 1 -1400 1300 300 R 50 50 1 1 I -X RDY1/SLWR 2 -1400 1200 300 R 50 50 1 1 I -X AVCC 3 200 1700 300 D 50 50 1 1 W -X XTALOUT 4 -1400 1000 300 R 50 50 1 1 O -X XTALIN 5 -1400 900 300 R 50 50 1 1 I -X AGND 6 200 -1500 300 U 50 50 1 1 W -X AVCC 7 300 1700 300 D 50 50 1 1 W -X DPLUS 8 -1400 700 300 R 50 50 1 1 B -X DMINUS 9 -1400 600 300 R 50 50 1 1 B -X AGND 10 300 -1500 300 U 50 50 1 1 W -X PB2/FD2 20 1300 200 300 L 50 50 1 1 B -X CTL1/FLAGB 30 -1400 -300 300 R 50 50 1 1 O -X PA7/FLAGD/~SLCS 40 1300 600 300 L 50 50 1 1 B -X PD5/FD13 50 1300 -1000 300 L 50 50 1 1 B -X VCC 11 -500 1700 300 D 50 50 1 1 W -X PB3/FD3 21 1300 100 300 L 50 50 1 1 B -X CTL2/FLAGC 31 -1400 -400 300 R 50 50 1 1 O -X GND 41 -200 -1500 300 U 50 50 1 1 W -X PD6/FD14 51 1300 -1100 300 L 50 50 1 1 B -X GND 12 -500 -1500 300 U 50 50 1 1 W -X PB4/FD4 22 1300 0 300 L 50 50 1 1 B -X VCC 32 -200 1700 300 D 50 50 1 1 W -X ~RESET 42 -1400 -600 300 R 50 50 1 1 I I -X PD7/FD15 52 1300 -1200 300 L 50 50 1 1 B -X IFCLK 13 -1400 400 300 R 50 50 1 1 B C -X PB5/FD5 23 1300 -100 300 L 50 50 1 1 B -X PA0/~INT0 33 1300 1300 300 L 50 50 1 1 B -X VCC 43 -100 1700 300 D 50 50 1 1 W -X GND 53 -100 -1500 300 U 50 50 1 1 W -X RESERVED 14 -1400 -1000 300 R 50 50 1 1 I -X PB6/FD6 24 1300 -200 300 L 50 50 1 1 B -X PA1/~INT1 34 1300 1200 300 L 50 50 1 1 B -X WAKEUP 44 -1400 -800 300 R 50 50 1 1 I -X CLKOUT 54 -1400 300 300 R 50 50 1 1 O C -X SCL 15 -1400 100 300 R 50 50 1 1 O -X PB7/FD7 25 1300 -300 300 L 50 50 1 1 B -X PA2/SLOE 35 1300 1100 300 L 50 50 1 1 B -X PD0/FD8 45 1300 -500 300 L 50 50 1 1 B -X VCC 55 0 1700 300 D 50 50 1 1 W -X SDA 16 -1400 0 300 R 50 50 1 1 B -X GND 26 -400 -1500 300 U 50 50 1 1 W -X PA3/WU2 36 1300 1000 300 L 50 50 1 1 B -X PD1/FD9 46 1300 -600 300 L 50 50 1 1 B -X GND 56 0 -1500 300 U 50 50 1 1 W -X VCC 17 -400 1700 300 D 50 50 1 1 W -X VCC 27 -300 1700 300 D 50 50 1 1 W -X PA4/FIFOADR0 37 1300 900 300 L 50 50 1 1 B -X PD2/FD10 47 1300 -700 300 L 50 50 1 1 B -X PAD 57 500 -1500 200 U 50 50 1 1 P -X PB0/FD0 18 1300 400 300 L 50 50 1 1 B -X GND 28 -300 -1500 300 U 50 50 1 1 W -X PA5/FIFOADR1 38 1300 800 300 L 50 50 1 1 B -X PD3/FD11 48 1300 -800 300 L 50 50 1 1 B -X PB1/FD1 19 1300 300 300 L 50 50 1 1 B -X CTL0/FLAGA 29 -1400 -200 300 R 50 50 1 1 O -X PA6/PKTEND 39 1300 700 300 L 50 50 1 1 B -X PD4/FD12 49 1300 -900 300 L 50 50 1 1 B -ENDDRAW -ENDDEF -# -# Conn_02x06_Odd_Even -# -DEF Conn_02x06_Odd_Even J 0 40 Y N 1 F N -F0 "J" 50 300 50 H V C CNN -F1 "Conn_02x06_Odd_Even" 50 -400 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -$FPLIST - Connector*:*2x??x*mm* - Connector*:*2x???Pitch* - Pin_Header_Straight_2X* - Pin_Header_Angled_2X* - Socket_Strip_Straight_2X* - Socket_Strip_Angled_2X* -$ENDFPLIST -DRAW -S -50 -295 0 -305 1 1 6 N -S -50 -195 0 -205 1 1 6 N -S -50 -95 0 -105 1 1 6 N -S -50 5 0 -5 1 1 6 N -S -50 105 0 95 1 1 6 N -S -50 205 0 195 1 1 6 N -S -50 250 150 -350 1 1 10 f -S 150 -295 100 -305 1 1 6 N -S 150 -195 100 -205 1 1 6 N -S 150 -95 100 -105 1 1 6 N -S 150 5 100 -5 1 1 6 N -S 150 105 100 95 1 1 6 N -S 150 205 100 195 1 1 6 N -X Pin_1 1 -200 200 150 R 50 50 1 1 P -X Pin_2 2 300 200 150 L 50 50 1 1 P -X Pin_3 3 -200 100 150 R 50 50 1 1 P -X Pin_4 4 300 100 150 L 50 50 1 1 P -X Pin_5 5 -200 0 150 R 50 50 1 1 P -X Pin_6 6 300 0 150 L 50 50 1 1 P -X Pin_7 7 -200 -100 150 R 50 50 1 1 P -X Pin_8 8 300 -100 150 L 50 50 1 1 P -X Pin_9 9 -200 -200 150 R 50 50 1 1 P -X Pin_10 10 300 -200 150 L 50 50 1 1 P -X Pin_11 11 -200 -300 150 R 50 50 1 1 P -X Pin_12 12 300 -300 150 L 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# IP425x-4-TTL -# -DEF IP425x-4-TTL U 0 40 Y Y 4 F N -F0 "U" 300 -100 60 H V C CNN -F1 "IP425x-4-TTL" 0 100 60 H V C CNN -F2 "" 0 0 60 H I C CNN -F3 "" 0 0 60 H I C CNN -DRAW -C -150 0 10 0 0 0 N -C -80 -90 10 0 0 0 N -C -80 0 10 0 0 0 N -C 0 -90 10 0 0 0 N -C 80 -90 10 0 0 0 N -C 80 0 10 0 0 0 N -C 150 0 10 0 0 0 N -S -200 50 200 -150 0 0 0 N -S -50 10 50 -10 0 0 0 N -P 2 0 0 0 -200 0 -50 0 N -P 2 0 0 0 -150 0 -150 -30 N -P 2 0 0 0 -110 -60 -50 -60 N -P 2 0 0 0 -110 -40 -50 -40 N -P 2 0 0 0 -80 0 -80 -40 N -P 2 0 0 0 0 -90 0 -150 N -P 2 0 0 0 50 -60 110 -60 N -P 2 0 0 0 50 -40 110 -40 N -P 2 0 0 0 50 0 200 0 N -P 2 0 0 0 80 0 80 -40 N -P 2 0 0 0 150 0 150 -30 N -P 3 0 0 0 -170 -30 -130 -30 -130 -40 N -P 3 0 0 0 -150 -70 -150 -90 -80 -90 N -P 3 0 0 0 80 -90 150 -90 150 -70 N -P 3 0 0 0 130 -30 170 -30 170 -40 N -P 4 0 0 0 -170 -70 -150 -30 -130 -70 -170 -70 N -P 4 0 0 0 -80 -60 -80 -90 80 -90 80 -60 N -P 4 0 0 0 130 -70 150 -30 170 -70 130 -70 N -X ~ 9 0 -200 50 U 50 50 0 1 P -X ~ 1 -300 0 100 R 50 50 1 1 P -X ~ 8 300 0 100 L 50 50 1 1 P -X ~ 2 -300 0 100 R 50 50 2 1 P -X ~ 7 300 0 100 L 50 50 2 1 P -X ~ 3 -300 0 100 R 50 50 3 1 P -X ~ 6 300 0 100 L 50 50 3 1 P -X ~ 4 -300 0 100 R 50 50 4 1 P -X ~ 5 300 0 100 L 50 50 4 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 75 50 H I C CNN -F1 "PWR_FLAG" 0 150 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -X pwr 1 0 0 0 U 50 50 0 0 w -P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N -ENDDRAW -ENDDEF -# -# USBLC6-2 -# -DEF USBLC6-2 U 0 40 Y Y 1 F N -F0 "U" 0 -300 60 H V C CNN -F1 "USBLC6-2" 0 300 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -C -140 0 5 0 1 0 N -C 0 -100 5 0 1 0 N -C 0 -50 5 0 1 0 N -C 0 50 5 0 1 0 N -C 0 100 5 0 1 0 N -C 140 0 5 0 1 0 N -S -300 200 300 -200 0 1 0 N -P 2 0 1 0 -300 -100 300 -100 N -P 2 0 1 0 -300 0 -30 0 N -P 2 0 1 0 -300 100 300 100 N -P 2 0 1 0 -50 -50 50 -50 N -P 2 0 1 0 -50 -20 -50 -80 N -P 2 0 1 0 -50 20 -50 80 N -P 2 0 1 0 -50 50 50 50 N -P 2 0 1 0 0 -50 0 -100 N -P 2 0 1 0 0 50 0 100 N -P 2 0 1 0 30 0 300 0 N -P 2 0 1 0 110 -20 110 -80 N -P 2 0 1 0 110 80 110 20 N -P 3 0 1 0 -140 0 -140 -50 -110 -50 N -P 3 0 1 0 -110 50 -140 50 -140 0 N -P 3 0 1 0 110 -50 140 -50 140 0 N -P 3 0 1 0 110 50 140 50 140 0 N -P 4 0 1 0 -110 -20 -110 -80 -50 -50 -110 -20 N -P 4 0 1 0 -110 20 -50 50 -110 80 -110 20 N -P 4 0 1 0 -30 30 -30 -30 30 0 -30 30 N -P 4 0 1 0 20 -30 30 -20 30 20 40 30 N -P 4 0 1 0 50 -20 110 -50 50 -80 50 -20 N -P 4 0 1 0 50 80 50 20 110 50 50 80 N -X IO1 1 -500 100 200 R 50 50 1 1 B -X GND 2 -500 0 200 R 50 50 1 1 W -X IO2 3 -500 -100 200 R 50 50 1 1 B -X IO2 4 500 -100 200 L 50 50 1 1 B -X VBUS 5 500 0 200 L 50 50 1 1 W -X IO1 6 500 100 200 L 50 50 1 1 B -ENDDRAW -ENDDEF -# -# pkl_24LC00 -# -DEF pkl_24LC00 U 0 30 Y Y 1 F N -F0 "U" -250 250 50 H V C CNN -F1 "pkl_24LC00" 250 250 50 H V C CNN -F2 "pkl_housings_sot:SOT-23-5" 500 250 50 H I L CNN -F3 "" 0 -100 50 H V C CNN -F4 "ANY" 0 0 60 H I C CNN "Source" -$FPLIST - SOT-23* -$ENDFPLIST -DRAW -X GND 2 0 -300 100 U 50 50 0 0 W -X VCC 5 0 300 100 D 50 50 0 0 W -S -300 200 300 -200 1 1 10 f -X SCL 1 -400 100 100 R 50 50 1 1 I -X SDA 3 -400 -100 100 R 50 50 1 1 B -X NC 4 400 0 100 L 50 50 1 1 N -ENDDRAW -ENDDEF -# -# pkl_C -# -DEF pkl_C C 0 10 N Y 1 F N -F0 "C" 25 100 50 H V L CNN -F1 "pkl_C" 25 -100 50 H V L CNN -F2 "" 38 -150 30 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - C? - C_????_* - C_???? - SMD*_c - Capacitor* -$ENDFPLIST -DRAW -P 2 0 1 20 -80 -30 80 -30 N -P 2 0 1 20 -80 30 80 30 N -X ~ 1 0 100 60 D 40 40 1 1 P -X ~ 2 0 -100 60 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pkl_C_Small -# -DEF pkl_C_Small C 0 10 N N 1 F N -F0 "C" 10 70 50 H V L CNN -F1 "pkl_C_Small" 10 -80 50 H V L CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - C? - C_????_* - C_???? - SMD*_c - Capacitor* -$ENDFPLIST -DRAW -P 2 0 1 13 -60 -20 60 -20 N -P 2 0 1 12 -60 20 60 20 N -X ~ 1 0 100 75 D 40 40 1 1 P -X ~ 2 0 -100 80 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pkl_LED -# -DEF pkl_LED D 0 40 Y N 1 F N -F0 "D" 0 100 50 H V C CNN -F1 "pkl_LED" 0 -100 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - LED-3MM - LED-5MM - LED-10MM - LED-0603 - LED-0805 - LED-1206 - LEDV -$ENDFPLIST -DRAW -P 2 0 1 0 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -P 3 0 1 0 65 -40 110 -80 105 -55 N -P 3 0 1 0 80 -25 125 -65 120 -40 N -X A A -200 0 150 R 40 40 1 1 P -X C C 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pkl_R4_Small -# -DEF pkl_R4_Small R 0 10 N N 4 F N -F0 "R" 30 20 50 H V L CNN -F1 "pkl_R4_Small" 30 -40 50 H V L CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - Resistor_* - R_* -$ENDFPLIST -DRAW -S -30 70 30 -70 0 1 8 N -X ~ 1 0 100 30 D 40 40 1 1 P -X ~ 2 0 -100 30 U 40 40 1 1 P -X ~ 3 0 100 30 D 40 40 2 1 P -X ~ 4 0 -100 30 U 40 40 2 1 P -X ~ 5 0 100 30 D 40 40 3 1 P -X ~ 6 0 -100 30 U 40 40 3 1 P -X ~ 7 0 100 30 D 40 40 4 1 P -X ~ 8 0 -100 30 U 40 40 4 1 P -ENDDRAW -ENDDEF -# -# pkl_R_Small -# -DEF pkl_R_Small R 0 10 N N 1 F N -F0 "R" 30 20 50 H V L CNN -F1 "pkl_R_Small" 30 -40 50 H V L CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - Resistor_* - R_* -$ENDFPLIST -DRAW -S -30 70 30 -70 0 1 8 N -X ~ 1 0 100 30 D 40 40 1 1 P -X ~ 2 0 -100 30 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pkl_USB_OTG -# -DEF pkl_USB_OTG P 0 40 Y Y 1 F N -F0 "P" 325 -125 50 H V C CNN -F1 "pkl_USB_OTG" 0 200 50 H V C CNN -F2 "" -50 -100 60 V V C CNN -F3 "" -50 -100 60 V V C CNN -$FPLIST - USB* -$ENDFPLIST -DRAW -S -250 -150 250 150 0 1 0 N -S -205 -150 -195 -120 0 1 0 N -S -105 -150 -95 -120 0 1 0 N -S -5 -150 5 -120 0 1 0 N -S 95 -150 105 -120 0 1 0 N -S 195 -150 205 -120 0 1 0 N -X VCC 1 -200 -300 150 U 50 50 1 1 w -X D- 2 -100 -300 150 U 50 50 1 1 P -X D+ 3 0 -300 150 U 50 50 1 1 P -X ID 4 100 -300 150 U 50 50 1 1 W -X GND 5 200 -300 150 U 50 50 1 1 W -X shield GND 400 100 150 L 50 50 1 1 P -ENDDRAW -ENDDEF -# -# pkl_VREG_5PIN_FIXED -# -DEF pkl_VREG_5PIN_FIXED U 0 40 Y Y 1 F N -F0 "U" -150 -200 60 H V C CNN -F1 "pkl_VREG_5PIN_FIXED" 0 200 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -S -200 150 200 -150 0 1 0 N -X IN 1 -300 100 100 R 50 50 1 1 W -X GND 2 300 -100 100 L 50 50 1 1 W -X EN 3 -300 -100 100 R 50 50 1 1 I -X BYP 4 -300 0 100 R 50 50 1 1 w -X OUT 5 300 100 100 L 50 50 1 1 w -ENDDRAW -ENDDEF -# -# pkl_XTAL_XGXG -# -DEF pkl_XTAL_XGXG X 0 40 Y N 1 F N -F0 "X" 100 100 50 H V C CNN -F1 "pkl_XTAL_XGXG" 50 -100 50 H V L CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -P 2 0 1 0 -45 -70 45 -70 N -P 2 0 1 16 -45 50 -45 -50 N -P 2 0 1 0 -45 70 45 70 N -P 2 0 1 16 45 50 45 -50 N -P 5 0 1 12 -20 40 20 40 20 -40 -20 -40 -20 40 N -X 1 1 -100 0 55 R 25 20 1 1 P -X 2 2 100 0 55 L 25 20 1 1 P -X case GND 0 -100 30 U 10 20 1 1 P -X case GND 0 100 30 D 10 20 1 1 P -ENDDRAW -ENDDEF -# #End Library diff --git a/hardware/fx2grok-flat/0.2/fx2grok-flat.kicad_pcb b/hardware/fx2grok-flat/0.2/fx2grok-flat.kicad_pcb index 16ec2f8..23c7631 100644 --- a/hardware/fx2grok-flat/0.2/fx2grok-flat.kicad_pcb +++ b/hardware/fx2grok-flat/0.2/fx2grok-flat.kicad_pcb @@ -2,13 +2,13 @@ (general (links 200) - (no_connects 0) + (no_connects 1) (area 20.326 17.3 64.85 40.593405) (thickness 1.6) - (drawings 54) + (drawings 55) (tracks 409) (zones 0) - (modules 81) + (modules 82) (nets 38) ) @@ -180,6 +180,36 @@ (add_net "Net-(D1-PadA)") ) + (module pkl_logos:1b2_Logo_SilkS_10mm (layer B.Cu) (tedit 59E172B6) (tstamp 59DF360E) + (at 39.5 30 90) + (fp_text reference REF** (at 0 -6 90) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value 1b2_Logo_SilkS_10mm (at 0 6.35 90) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -3 -5) (end 5 -5) (layer B.SilkS) (width 0.4)) + (fp_line (start -4 -4) (end -3 -5) (layer B.SilkS) (width 0.4)) + (fp_line (start 5 -5) (end 4 -4) (layer B.SilkS) (width 0.4)) + (fp_line (start 5 3) (end 5 -5) (layer B.SilkS) (width 0.4)) + (fp_line (start 4 4) (end 5 3) (layer B.SilkS) (width 0.4)) + (fp_line (start 4 -4) (end 4 4) (layer B.SilkS) (width 0.4)) + (fp_line (start -4 -4) (end 4 -4) (layer B.SilkS) (width 0.4)) + (fp_line (start -4 -1) (end -4 -4) (layer B.SilkS) (width 0.4)) + (fp_line (start 1 -1) (end -4 -1) (layer B.SilkS) (width 0.4)) + (fp_line (start 1 4) (end 1 -1) (layer B.SilkS) (width 0.4)) + (fp_line (start 4 4) (end 1 4) (layer B.SilkS) (width 0.4)) + (fp_line (start -4 0) (end 0 0) (layer B.SilkS) (width 0.4)) + (fp_line (start -5 1) (end -4 0) (layer B.SilkS) (width 0.4)) + (fp_line (start 0 0) (end -1 1) (layer B.SilkS) (width 0.4)) + (fp_line (start 0 4) (end 0 0) (layer B.SilkS) (width 0.4)) + (fp_line (start -1 5) (end 0 4) (layer B.SilkS) (width 0.4)) + (fp_line (start -5 1) (end -1 1) (layer B.SilkS) (width 0.4)) + (fp_line (start -5 5) (end -5 1) (layer B.SilkS) (width 0.4)) + (fp_line (start -1 5) (end -5 5) (layer B.SilkS) (width 0.4)) + (fp_line (start -1 1) (end -1 5) (layer B.SilkS) (width 0.4)) + ) + (module pkl_misc:via0305 (layer F.Cu) (tedit 59BDC71B) (tstamp 59DFEC51) (at 28.9 33.9) (fp_text reference REF** (at 0 0.35) (layer F.SilkS) hide @@ -1118,7 +1148,7 @@ (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13)) (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13)) (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask) - (net 1 +3V3)) + (net 15 /~RESET)) (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask) (net 2 GND)) (model Capacitors_SMD.3dshapes/C_0402.wrl @@ -1137,7 +1167,7 @@ (fp_text reference C15 (at 0 0 90) (layer F.Fab) (effects (font (size 0.635 0.635) (thickness 0.1))) ) - (fp_text value 12p (at 0 1 90) (layer F.Fab) + (fp_text value 10p (at 0 1 90) (layer F.Fab) (effects (font (size 0.635 0.635) (thickness 0.1))) ) (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17)) @@ -1167,7 +1197,7 @@ (fp_text reference C16 (at 0 0 270) (layer F.Fab) (effects (font (size 0.635 0.635) (thickness 0.1))) ) - (fp_text value 12p (at 2.95 0 270) (layer F.Fab) + (fp_text value 10p (at 2.95 0 270) (layer F.Fab) (effects (font (size 0.635 0.635) (thickness 0.1))) ) (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17)) @@ -1754,7 +1784,7 @@ (fp_text reference R10 (at 0 0) (layer F.Fab) (effects (font (size 0.635 0.635) (thickness 0.1))) ) - (fp_text value 2k7 (at 1.85 0) (layer F.Fab) + (fp_text value 1m (at 1.85 0) (layer F.Fab) (effects (font (size 0.635 0.635) (thickness 0.1))) ) (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25) @@ -2226,6 +2256,9 @@ ) ) + (gr_text 1BitSquared (at 32.2 30 270) (layer B.SilkS) + (effects (font (size 1.5 1.5) (thickness 0.3)) (justify mirror)) + ) (gr_text Flat (at 42.2 25.4) (layer F.SilkS) (tstamp 59DFC863) (effects (font (size 1 1) (thickness 0.25))) ) diff --git a/hardware/fx2grok-flat/0.2/fx2grok-flat.sch b/hardware/fx2grok-flat/0.2/fx2grok-flat.sch index 3b69365..693d8ae 100644 --- a/hardware/fx2grok-flat/0.2/fx2grok-flat.sch +++ b/hardware/fx2grok-flat/0.2/fx2grok-flat.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 +EESchema Schematic File Version 4 LIBS:power LIBS:device LIBS:switches @@ -48,7 +48,7 @@ LIBS:pkl_silabs LIBS:pkl_tag_connect LIBS:pkl_texas LIBS:fx2grok-flat-cache -EELAYER 25 0 +EELAYER 26 0 EELAYER END $Descr A4 11693 8268 encoding utf-8 @@ -117,7 +117,7 @@ $EndComp Wire Wire Line 4900 2800 4900 2700 Wire Wire Line - 4900 2700 5700 2700 + 4900 2700 5000 2700 Wire Wire Line 5700 2700 5700 2800 Wire Wire Line @@ -127,7 +127,7 @@ Wire Wire Line 5400 2800 5400 2700 Connection ~ 5400 2700 Wire Wire Line - 5300 2600 5300 2800 + 5300 2600 5300 2700 Connection ~ 5300 2700 Wire Wire Line 5200 2800 5200 2700 @@ -173,21 +173,21 @@ Wire Wire Line Text Label 6800 3300 0 60 ~ 0 PA1 Wire Wire Line - 6700 4100 7600 4100 + 6700 4100 6800 4100 Wire Wire Line - 6700 4200 7600 4200 + 6700 4200 6900 4200 Wire Wire Line - 6700 4300 7600 4300 + 6700 4300 7000 4300 Wire Wire Line - 6700 4400 7600 4400 + 6700 4400 7100 4400 Wire Wire Line - 6700 4500 7600 4500 + 6700 4500 7200 4500 Wire Wire Line - 6700 4600 7600 4600 + 6700 4600 7300 4600 Wire Wire Line - 6700 4700 7600 4700 + 6700 4700 7400 4700 Wire Wire Line - 6700 4800 7600 4800 + 6700 4800 7500 4800 Text Label 7600 4100 0 60 ~ 0 PB0 Text Label 7600 4200 0 60 ~ 0 @@ -242,7 +242,7 @@ $EndComp Wire Wire Line 3400 4400 3200 4400 Wire Wire Line - 3200 4300 3200 4500 + 3200 4300 3200 4400 Wire Wire Line 3200 4500 3400 4500 Connection ~ 3200 4400 @@ -335,7 +335,7 @@ RESERVED\nmust be tied\nto GND Wire Wire Line 4900 6000 4900 6100 Wire Wire Line - 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