From: Uwe Hermann Date: Tue, 6 Oct 2015 06:28:03 +0000 (+0200) Subject: usb_{signalling,packet}: Minor cosmetics. X-Git-Tag: libsigrokdecode-0.4.0~50 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=64b45b207121eeb9b0db7f71ba067f23fe7f7ea7;p=libsigrokdecode.git usb_{signalling,packet}: Minor cosmetics. --- diff --git a/decoders/usb_packet/pd.py b/decoders/usb_packet/pd.py index 8a8503e..89549fa 100644 --- a/decoders/usb_packet/pd.py +++ b/decoders/usb_packet/pd.py @@ -145,7 +145,7 @@ def bitstr_to_num(bitstr): def reverse_number(num, count): out = list(count * '0') for i in range(0, count): - if (num >> i & 1): + if num >> i & 1: out[i] = '1'; return int(''.join(out), 2) @@ -154,7 +154,7 @@ def calc_crc5(bitstr): crc5 = 0x1f for bit in bitstr: crc5 <<= 1 - if (int(bit) != (crc5 >> 5)): + if int(bit) != (crc5 >> 5): crc5 ^= poly5 crc5 &= 0x1f crc5 ^= 0x1f @@ -165,7 +165,7 @@ def calc_crc16(bitstr): crc16 = 0xffff for bit in bitstr: crc16 <<= 1 - if (int(bit) != (crc16 >> 16)): + if int(bit) != (crc16 >> 16): crc16 ^= poly16 crc16 &= 0xffff crc16 ^= 0xffff @@ -314,7 +314,7 @@ class Decoder(srd.Decoder): crc5 = bitstr_to_num(packet[27:31 + 1]) crc5_calc = calc_crc5(packet[16:27]) self.ss, self.es = self.bits[27][1], self.bits[31][2] - if (crc5 == crc5_calc): + if crc5 == crc5_calc: self.putpb(['CRC5', crc5]) self.putb([6, ['CRC5: 0x%02X' % crc5, 'CRC5', 'C']]) else: @@ -346,7 +346,7 @@ class Decoder(srd.Decoder): crc16 = bitstr_to_num(packet[-16:]) crc16_calc = calc_crc16(packet[16:-16]) self.ss, self.es = self.bits[-16][1], self.bits[-1][2] - if (crc16 == crc16_calc): + if crc16 == crc16_calc: self.putpb(['CRC16', crc16]) self.putb([9, ['CRC16: 0x%04X' % crc16, 'CRC16', 'C']]) else: diff --git a/decoders/usb_signalling/pd.py b/decoders/usb_signalling/pd.py index 6b4c028..768a3b7 100644 --- a/decoders/usb_signalling/pd.py +++ b/decoders/usb_signalling/pd.py @@ -217,11 +217,10 @@ class Decoder(srd.Decoder): self.syms.append(sym) self.putpb(['SYM', sym]) b = '0' if self.oldsym != sym else '1' - if (self.oldsym != sym): - # edge + if self.oldsym != sym: edgesym = symbols[self.options['signalling']][tuple(self.edgepins)] - if (edgesym not in ('SE0', 'SE1')): - if (edgesym == sym): + if edgesym not in ('SE0', 'SE1'): + if edgesym == sym: self.bitwidth = self.bitwidth - (0.001 * self.bitwidth) self.samplepos = self.samplepos - (0.01 * self.bitwidth) else: