From: Uwe Hermann Date: Thu, 19 May 2016 16:38:05 +0000 (+0200) Subject: Consistency renames of {ss,es}_ variables. X-Git-Tag: libsigrokdecode-0.5.0~165 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=5b0b88ced37e8fbe3031867255412f449245ca26;p=libsigrokdecode.git Consistency renames of {ss,es}_ variables. --- diff --git a/decoders/arm_tpiu/pd.py b/decoders/arm_tpiu/pd.py index cf5e875..d111311 100644 --- a/decoders/arm_tpiu/pd.py +++ b/decoders/arm_tpiu/pd.py @@ -47,7 +47,7 @@ class Decoder(srd.Decoder): self.syncbuf = [] self.prevsample = 0 self.stream = 0 - self.stream_ss = None + self.ss_stream = None self.bytenum = 0 def start(self): @@ -57,10 +57,10 @@ class Decoder(srd.Decoder): def stream_changed(self, ss, stream): if self.stream != stream: if self.stream != 0: - self.put(self.stream_ss, ss, self.out_ann, + self.put(self.ss_stream, ss, self.out_ann, [0, ['Stream %d' % self.stream, 'S%d' % self.stream]]) self.stream = stream - self.stream_ss = ss + self.ss_stream = ss def emit_byte(self, ss, es, byte): if self.stream == self.options['stream']: diff --git a/decoders/em4100/pd.py b/decoders/em4100/pd.py index d47b43e..0768f9d 100644 --- a/decoders/em4100/pd.py +++ b/decoders/em4100/pd.py @@ -74,12 +74,12 @@ class Decoder(srd.Decoder): self.oldpl = 0 self.oldsamplenum = 0 self.last_bit_pos = 0 - self.first_ss = 0 + self.ss_first = 0 self.first_one = 0 self.state = 'HEADER' self.data = 0 self.data_bits = 0 - self.data_ss = 0 + self.ss_data = 0 self.data_parity = 0 self.payload_cnt = 0 self.data_col_parity = [0, 0, 0, 0, 0, 0] @@ -105,14 +105,14 @@ class Decoder(srd.Decoder): if self.first_one > 0: self.first_one += 1 if self.first_one == 9: - self.put(self.first_ss, es, self.out_ann, + self.put(self.ss_first, es, self.out_ann, [1, ['Header', 'Head', 'He', 'H']]) self.first_one = 0 self.state = 'PAYLOAD' return if self.first_one == 0: self.first_one = 1 - self.first_ss = ss + self.ss_first = ss if bit == 0: self.first_one = 0 @@ -121,14 +121,14 @@ class Decoder(srd.Decoder): if self.state == 'PAYLOAD': self.payload_cnt += 1 if self.data_bits == 0: - self.data_ss = ss + self.ss_data = ss self.data = 0 self.data_parity = 0 self.data_bits += 1 if self.data_bits == 5: s = 'Version/customer' if self.payload_cnt <= 10 else 'Data' c = 2 if self.payload_cnt <= 10 else 3 - self.put(self.data_ss, ss, self.out_ann, + self.put(self.ss_data, ss, self.out_ann, [c, [s + ': %X' % self.data, '%X' % self.data]]) s = 'OK' if self.data_parity == bit else 'ERROR' c = 4 if s == 'OK' else 5 @@ -150,7 +150,7 @@ class Decoder(srd.Decoder): if self.state == 'TRAILER': self.payload_cnt += 1 if self.data_bits == 0: - self.data_ss = ss + self.ss_data = ss self.data = 0 self.data_parity = 0 self.data_bits += 1 @@ -172,7 +172,7 @@ class Decoder(srd.Decoder): # Emit an annotation for valid-looking tags. all_col_parity_ok = (self.data_col_parity[1:5] == self.col_parity[1:5]) if all_col_parity_ok and self.all_row_parity_ok: - self.put(self.first_ss, es, self.out_ann, + self.put(self.ss_first, es, self.out_ann, [9, ['Tag: %010X' % self.tag, 'Tag', 'T']]) self.tag = 0 diff --git a/decoders/rgb_led_ws281x/pd.py b/decoders/rgb_led_ws281x/pd.py index 439f736..6f65960 100644 --- a/decoders/rgb_led_ws281x/pd.py +++ b/decoders/rgb_led_ws281x/pd.py @@ -49,7 +49,7 @@ class Decoder(srd.Decoder): def __init__(self): self.samplerate = None self.oldpin = None - self.packet_ss = None + self.ss_packet = None self.ss = None self.es = None self.bits = [] @@ -66,10 +66,10 @@ class Decoder(srd.Decoder): if len(self.bits) == 24: grb = reduce(lambda a, b: (a << 1) | b, self.bits) rgb = (grb & 0xff0000) >> 8 | (grb & 0x00ff00) << 8 | (grb & 0x0000ff) - self.put(self.packet_ss, samplenum, self.out_ann, + self.put(self.ss_packet, samplenum, self.out_ann, [2, ['#%06x' % rgb]]) self.bits = [] - self.packet_ss = None + self.ss_packet = None def decode(self, ss, es, data): if not self.samplerate: @@ -98,7 +98,7 @@ class Decoder(srd.Decoder): self.inreset = True self.bits = [] - self.packet_ss = None + self.ss_packet = None self.ss = None if not self.oldpin and pin: @@ -115,8 +115,8 @@ class Decoder(srd.Decoder): self.bits.append(bit_) self.handle_bits(samplenum) - if self.packet_ss is None: - self.packet_ss = samplenum + if self.ss_packet is None: + self.ss_packet = samplenum self.ss = samplenum diff --git a/decoders/spiflash/pd.py b/decoders/spiflash/pd.py index 1e3b916..17ebae3 100644 --- a/decoders/spiflash/pd.py +++ b/decoders/spiflash/pd.py @@ -88,7 +88,7 @@ class Decoder(srd.Decoder): self.put(self.ss, self.es, self.out_ann, data) def putb(self, data): - self.put(self.block_ss, self.block_es, self.out_ann, data) + self.put(self.ss_block, self.es_block, self.out_ann, data) def handle_wren(self, mosi, miso): self.putx([0, ['Command: %s' % cmds[self.state][1]]]) @@ -188,22 +188,22 @@ class Decoder(srd.Decoder): # Bytes 2/3/4: Master sends read address (24bits, MSB-first). self.putx([24, ['AD%d: 0x%02x' % (self.cmdstate - 1, mosi)]]) if self.cmdstate == 2: - self.block_ss = self.ss + self.ss_block = self.ss self.addr |= (mosi << ((4 - self.cmdstate) * 8)) elif self.cmdstate == 5: self.putx([24, ['Dummy byte: 0x%02x' % mosi]]) - self.block_es = self.es + self.es_block = self.es self.putb([5, ['Read address: 0x%06x' % self.addr]]) self.addr = 0 elif self.cmdstate >= 6: # Bytes 6-x: Master reads data bytes (until CS# de-asserted). # TODO: For now we hardcode 32 bytes per FAST READ command. if self.cmdstate == 6: - self.block_ss = self.ss + self.ss_block = self.ss if self.cmdstate <= 32 + 5: # TODO: While CS# asserted. self.data.append(miso) if self.cmdstate == 32 + 5: # TODO: If CS# got de-asserted. - self.block_es = self.es + self.es_block = self.es s = ' '.join([hex(b)[2:] for b in self.data]) self.putb([25, ['Read data: %s' % s]]) self.data = [] diff --git a/decoders/stepper_motor/pd.py b/decoders/stepper_motor/pd.py index 8a1c2e1..7664fc4 100644 --- a/decoders/stepper_motor/pd.py +++ b/decoders/stepper_motor/pd.py @@ -52,7 +52,7 @@ class Decoder(srd.Decoder): def __init__(self): self.oldstep = None - self.prev_step_ss = None + self.ss_prev_step = None self.pos = 0 self.prev_speed = None self.prev_pos = None @@ -70,18 +70,18 @@ class Decoder(srd.Decoder): self.unit = 'mm' def step(self, ss, direction): - if self.prev_step_ss is not None: - delta = ss - self.prev_step_ss + if self.ss_prev_step is not None: + delta = ss - self.ss_prev_step speed = self.samplerate / delta / self.scale speed_txt = self.format % speed pos_txt = self.format % (self.pos / self.scale) - self.put(self.prev_step_ss, ss, self.out_ann, + self.put(self.ss_prev_step, ss, self.out_ann, [0, [speed_txt + ' ' + self.unit + '/s', speed_txt]]) - self.put(self.prev_step_ss, ss, self.out_ann, + self.put(self.ss_prev_step, ss, self.out_ann, [1, [pos_txt + ' ' + self.unit, pos_txt]]) self.pos += (1 if direction else -1) - self.prev_step_ss = ss + self.ss_prev_step = ss def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: diff --git a/decoders/usb_request/pd.py b/decoders/usb_request/pd.py index a4e3577..39a9df6 100644 --- a/decoders/usb_request/pd.py +++ b/decoders/usb_request/pd.py @@ -141,8 +141,8 @@ class Decoder(srd.Decoder): self.request = {} self.request_id = 0 self.transaction_state = 'IDLE' - self.transaction_ss = None - self.transaction_es = None + self.ss_transaction = None + self.es_transaction = None self.transaction_ep = None self.transaction_addr = None self.wrote_pcap_header = False @@ -182,7 +182,7 @@ class Decoder(srd.Decoder): addr = self.transaction_addr if not (addr, ep) in self.request: self.request[(addr, ep)] = {'setup_data': [], 'data': [], - 'type': None, 'ss': self.transaction_ss, 'es': None, + 'type': None, 'ss': self.ss_transaction, 'es': None, 'id': self.request_id, 'addr': addr, 'ep': ep} self.request_id += 1 request_started = 1 @@ -192,12 +192,12 @@ class Decoder(srd.Decoder): if request['type'] in (None, 'BULK IN') and self.transaction_type == 'IN': request['type'] = 'BULK IN' request['data'] += self.transaction_data - request['es'] = self.transaction_es + request['es'] = self.es_transaction self.handle_request(request_started, request_end) elif request['type'] in (None, 'BULK OUT') and self.transaction_type == 'OUT': request['type'] = 'BULK OUT' request['data'] += self.transaction_data - request['es'] = self.transaction_es + request['es'] = self.es_transaction self.handle_request(request_started, request_end) # CONTROL, SETUP stage @@ -223,11 +223,11 @@ class Decoder(srd.Decoder): # CONTROL, STATUS stage elif request['type'] == 'SETUP IN' and self.transaction_type == 'OUT': - request['es'] = self.transaction_es + request['es'] = self.es_transaction self.handle_request(0, request_end) elif request['type'] == 'SETUP OUT' and self.transaction_type == 'IN': - request['es'] = self.transaction_es + request['es'] = self.es_transaction self.handle_request(0, request_end) else: @@ -306,12 +306,12 @@ class Decoder(srd.Decoder): if pname == 'SOF': return if self.transaction_state == 'TOKEN RECEIVED': - transaction_timeout = self.transaction_es + transaction_timeout = self.es_transaction # Token length is 35 bits, timeout is 16..18 bit times # (USB 2.0 7.1.19.1). - transaction_timeout += int((self.transaction_es - self.transaction_ss) / 2) + transaction_timeout += int((self.es_transaction - self.ss_transaction) / 2) if ss > transaction_timeout: - self.transaction_es = transaction_timeout + self.es_transaction = transaction_timeout self.handshake = 'timeout' self.handle_transfer() self.transaction_state = 'IDLE' @@ -323,8 +323,8 @@ class Decoder(srd.Decoder): sync, pid, addr, ep, crc5 = pinfo self.transaction_data = [] - self.transaction_ss = ss - self.transaction_es = es + self.ss_transaction = ss + self.es_transaction = es self.transaction_state = 'TOKEN RECEIVED' self.transaction_ep = ep self.transaction_addr = addr @@ -347,7 +347,7 @@ class Decoder(srd.Decoder): self.handshake = pname self.transaction_state = 'IDLE' - self.transaction_es = es + self.es_transaction = es self.handle_transfer() elif pname == 'PRE': diff --git a/decoders/wiegand/pd.py b/decoders/wiegand/pd.py index 2352fbc..a42c9d2 100644 --- a/decoders/wiegand/pd.py +++ b/decoders/wiegand/pd.py @@ -55,7 +55,7 @@ class Decoder(srd.Decoder): self._d1_prev = None self._state = None - self._ss_state = None + self.ss_state = None self.ss_bit = None self.es_bit = None @@ -98,8 +98,8 @@ class Decoder(srd.Decoder): elif self._state == 'invalid': ann = [1, [self._state]] if ann: - self.put(self._ss_state, self.samplenum, self.out_ann, ann) - self._ss_state = self.samplenum + self.put(self.ss_state, self.samplenum, self.out_ann, ann) + self.ss_state = self.samplenum self._state = state self._bits = []