From: Uwe Hermann Date: Tue, 1 May 2012 22:48:53 +0000 (+0200) Subject: JTAG: Add Glyn Tonga2 dumps (Toshiba TMPA900). X-Git-Tag: sigrok-dumps-0.1.0~9 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=508f5baa6f02810c262ca2aabd8869f87d959f7d;p=sigrok-dumps.git JTAG: Add Glyn Tonga2 dumps (Toshiba TMPA900). --- diff --git a/jtag/glyn_tonga2/README b/jtag/glyn_tonga2/README new file mode 100644 index 0000000..2919d58 --- /dev/null +++ b/jtag/glyn_tonga2/README @@ -0,0 +1,98 @@ +------------------------------------------------------------------------------- +JTAG / Toshiba TMPA900 +------------------------------------------------------------------------------- + +This is a set of example captures of JTAG communication to a Glyn Tonga2 +eval board with a Toshiba TMPA900 (ARM9) microcontroller. + +The JTAG adapter used was the FTDI FT2232H based Floss-JTAG (V0.2). + +Details: +http://randomprojects.org/wiki/Floss-JTAG +http://randomprojects.org/wiki/Linux_on_the_Glyn_Tonga2_%28Toshiba_TMPA900,_ARM9%29#JTAG +http://www.semicon.toshiba.co.jp/openb2b/websearch/productDetails.jsp?partKey=TMPA900CMXBG + + +Logic analyzer setup +-------------------- + +The logic analyzer used was a Saleae Logic (at 4MHz): + + Probe JTAG connector + -------------------------- + 1 (black) TRST# + 2 (brown) TDI + 3 (red) TMS + 4 (orange) TCK + 5 (yellow) TDO + 6 (green) RST + 7 (blue) RTCK + + +glyn_tonga2_init.sr +------------------- + +The following OpenOCD command was used: + + openocd -f interface/flossjtag-noeeprom.cfg -f board/glyn_tonga2.cfg \ + -c "adapter_khz 1000" -c "init" + +(this runs the OpenOCD "tonga2_init" function too, which sets up clocks/RAM) + +The sigrok command line used was: + + sigrok-cli -d 0:samplerate=4mhz --time 5s \ + -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST,7=RTCK' -o + + +glyn_tonga2_reset.sr +-------------------- + +The following OpenOCD command was used: + + openocd -f interface/flossjtag-noeeprom.cfg -f board/glyn_tonga2.cfg \ + -c "adapter_khz 1000" -c "init" -c "halt" -c "poll off" \ + -c "sleep 4000" -c "reset" -c "halt" + +(only the last "reset" and "halt" are in the dump) + +The sigrok command line used was: + + sigrok-cli -d 0:samplerate=4mhz --time 5s \ + -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST,7=RTCK' -o + + +glyn_tonga2_idle.sr +------------------- + +The following OpenOCD command was used: + + openocd -f interface/flossjtag-noeeprom.cfg -f board/glyn_tonga2.cfg \ + -c "adapter_khz 1000" -c "init" + +The sigrok command line used was: + + sigrok-cli -d 0:samplerate=4mhz --time 3s \ + -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST,7=RTCK' -o + +sigrok-cli was only started a few seconds after the OpenOCD init/connection +to capture what happens when the user doesn't actively use OpenOCD commands. + + +glyn_tonga2_irscan_drscan.sr +---------------------------- + +The following OpenOCD command was used: + + openocd -f interface/flossjtag-noeeprom.cfg -f board/glyn_tonga2.cfg \ + -c "adapter_khz 1000" -c "init" -c "halt" -c "poll off" \ + -c "sleep 4000" -c "irscan tmpa900.cpu 0xe" \ + -c "drscan tmpa900.cpu 32 0" + +This gets the 32bit contents of the IDCODE register (0b1110): 0x07926031. + +The sigrok command line used was: + + sigrok-cli -d 0:samplerate=4mhz --time 5s \ + -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST,7=RTCK' -o + diff --git a/jtag/glyn_tonga2/glyn_tonga2_idle.sr b/jtag/glyn_tonga2/glyn_tonga2_idle.sr new file mode 100644 index 0000000..5e94e00 Binary files /dev/null and b/jtag/glyn_tonga2/glyn_tonga2_idle.sr differ diff --git a/jtag/glyn_tonga2/glyn_tonga2_init.sr b/jtag/glyn_tonga2/glyn_tonga2_init.sr new file mode 100644 index 0000000..aa2fe38 Binary files /dev/null and b/jtag/glyn_tonga2/glyn_tonga2_init.sr differ diff --git a/jtag/glyn_tonga2/glyn_tonga2_irscan_drscan.sr b/jtag/glyn_tonga2/glyn_tonga2_irscan_drscan.sr new file mode 100644 index 0000000..5acf7c8 Binary files /dev/null and b/jtag/glyn_tonga2/glyn_tonga2_irscan_drscan.sr differ diff --git a/jtag/glyn_tonga2/glyn_tonga2_reset.sr b/jtag/glyn_tonga2/glyn_tonga2_reset.sr new file mode 100644 index 0000000..e193f65 Binary files /dev/null and b/jtag/glyn_tonga2/glyn_tonga2_reset.sr differ diff --git a/jtag/olimex_stm32-h103/README b/jtag/olimex_stm32-h103/README index bb448e3..d278e4f 100644 --- a/jtag/olimex_stm32-h103/README +++ b/jtag/olimex_stm32-h103/README @@ -1,5 +1,5 @@ ------------------------------------------------------------------------------- -JTAG +JTAG / ST STM32 ------------------------------------------------------------------------------- This is a set of example captures of JTAG communication to an Olimex