From: David Barksdale Date: Mon, 15 Sep 2014 16:50:09 +0000 (-0500) Subject: uart: Implement signal inversion X-Git-Tag: libsigrokdecode-0.4.0~170 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=4eafeeefc716a617837f1d69c040753b0b8d71f7;p=libsigrokdecode.git uart: Implement signal inversion --- diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py index d13a119..b8508a7 100644 --- a/decoders/uart/pd.py +++ b/decoders/uart/pd.py @@ -102,7 +102,10 @@ class Decoder(srd.Decoder): 'values': ('lsb-first', 'msb-first')}, {'id': 'format', 'desc': 'Data format', 'default': 'ascii', 'values': ('ascii', 'dec', 'hex', 'oct', 'bin')}, - # TODO: Options to invert the signal(s). + {'id': 'invert_rx', 'desc': 'Invert RX?', 'default': 'no', + 'values': ('yes', 'no')}, + {'id': 'invert_tx', 'desc': 'Invert TX?', 'default': 'no', + 'values': ('yes', 'no')}, ) annotations = ( ('rx-data', 'RX data'), @@ -336,6 +339,11 @@ class Decoder(srd.Decoder): # continue self.oldpins, (rx, tx) = pins, pins + if self.options['invert_rx'] == 'yes': + rx = not rx + if self.options['invert_tx'] == 'yes': + tx = not tx + # Either RX or TX (but not both) can be omitted. has_pin = [rx in (0, 1), tx in (0, 1)] if has_pin == [False, False]: