From: Uwe Hermann Date: Sat, 23 Sep 2017 18:09:15 +0000 (+0200) Subject: fx2grok-tiny: Add initial 0.2 version. X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=461363c33f4f97a227f011c619fc6e442de9c893;p=fx2grok.git fx2grok-tiny: Add initial 0.2 version. Almost identical to 0.1, only the metadata has been updated and the 0.1 being broken warnings are removed. --- diff --git a/hardware/fx2grok-tiny/0.2/fp-lib-table b/hardware/fx2grok-tiny/0.2/fp-lib-table new file mode 100644 index 0000000..5a1c155 --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fp-lib-table @@ -0,0 +1,3 @@ +(fp_lib_table + (lib (name fx2grok-tiny)(type KiCad)(uri "$(KIPRJMOD)/fx2grok-tiny.pretty")(options "")(descr "")) +) diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny-cache.lib b/hardware/fx2grok-tiny/0.2/fx2grok-tiny-cache.lib new file mode 100644 index 0000000..ff15baa --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny-cache.lib @@ -0,0 +1,281 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# +3V3 +# +DEF +3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "+3V3" 0 140 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +ALIAS +3.3V +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# +5V +# +DEF +5V #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "+5V" 0 140 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +5V 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# CY7C68013A-56 +# +DEF CY7C68013A-56 IC 0 40 Y Y 1 F N +F0 "IC" 0 -1700 60 H V C CNN +F1 "CY7C68013A-56" 0 0 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -1100 1400 1000 -1300 0 1 0 f +X RDY0/SLRD 1 -1400 1300 300 R 50 50 1 1 I +X RDY1/SLWR 2 -1400 1200 300 R 50 50 1 1 I +X AVCC 3 200 1700 300 D 50 50 1 1 W +X XTALOUT 4 -1400 1000 300 R 50 50 1 1 O +X XTALIN 5 -1400 900 300 R 50 50 1 1 I +X AGND 6 200 -1500 300 U 50 50 1 1 W +X AVCC 7 300 1700 300 D 50 50 1 1 W +X DPLUS 8 -1400 700 300 R 50 50 1 1 B +X DMINUS 9 -1400 600 300 R 50 50 1 1 B +X AGND 10 300 -1500 300 U 50 50 1 1 W +X PB2/FD2 20 1300 200 300 L 50 50 1 1 B +X CTL1/FLAGB 30 -1400 -300 300 R 50 50 1 1 O +X PA7/FLAGD/~SLCS 40 1300 600 300 L 50 50 1 1 B +X PD5/FD13 50 1300 -1000 300 L 50 50 1 1 B +X VCC 11 -500 1700 300 D 50 50 1 1 W +X PB3/FD3 21 1300 100 300 L 50 50 1 1 B +X CTL2/FLAGC 31 -1400 -400 300 R 50 50 1 1 O +X GND 41 -200 -1500 300 U 50 50 1 1 W +X PD6/FD14 51 1300 -1100 300 L 50 50 1 1 B +X GND 12 -500 -1500 300 U 50 50 1 1 W +X PB4/FD4 22 1300 0 300 L 50 50 1 1 B +X VCC 32 -200 1700 300 D 50 50 1 1 W +X ~RESET 42 -1400 -600 300 R 50 50 1 1 I I +X PD7/FD15 52 1300 -1200 300 L 50 50 1 1 B +X IFCLK 13 -1400 400 300 R 50 50 1 1 B C +X PB5/FD5 23 1300 -100 300 L 50 50 1 1 B +X PA0/~INT0 33 1300 1300 300 L 50 50 1 1 B +X VCC 43 -100 1700 300 D 50 50 1 1 W +X GND 53 -100 -1500 300 U 50 50 1 1 W +X RESERVED 14 -1400 -1000 300 R 50 50 1 1 I +X PB6/FD6 24 1300 -200 300 L 50 50 1 1 B +X PA1/~INT1 34 1300 1200 300 L 50 50 1 1 B +X WAKEUP 44 -1400 -800 300 R 50 50 1 1 I +X CLKOUT 54 -1400 300 300 R 50 50 1 1 O C +X SCL 15 -1400 100 300 R 50 50 1 1 O +X PB7/FD7 25 1300 -300 300 L 50 50 1 1 B +X PA2/SLOE 35 1300 1100 300 L 50 50 1 1 B +X PD0/FD8 45 1300 -500 300 L 50 50 1 1 B +X VCC 55 0 1700 300 D 50 50 1 1 W +X SDA 16 -1400 0 300 R 50 50 1 1 B +X GND 26 -400 -1500 300 U 50 50 1 1 W +X PA3/WU2 36 1300 1000 300 L 50 50 1 1 B +X PD1/FD9 46 1300 -600 300 L 50 50 1 1 B +X GND 56 0 -1500 300 U 50 50 1 1 W +X VCC 17 -400 1700 300 D 50 50 1 1 W +X VCC 27 -300 1700 300 D 50 50 1 1 W +X PA4/FIFOADR0 37 1300 900 300 L 50 50 1 1 B +X PD2/FD10 47 1300 -700 300 L 50 50 1 1 B +X PB0/FD0 18 1300 400 300 L 50 50 1 1 B +X GND 28 -300 -1500 300 U 50 50 1 1 W +X PA5/FIFOADR1 38 1300 800 300 L 50 50 1 1 B +X PD3/FD11 48 1300 -800 300 L 50 50 1 1 B +X PB1/FD1 19 1300 300 300 L 50 50 1 1 B +X CTL0/FLAGA 29 -1400 -200 300 R 50 50 1 1 O +X PA6/PKTEND 39 1300 700 300 L 50 50 1 1 B +X PD4/FD12 49 1300 -900 300 L 50 50 1 1 B +ENDDRAW +ENDDEF +# +# Conn_01x05 +# +DEF Conn_01x05 J 0 40 Y N 1 F N +F0 "J" 0 300 50 H V C CNN +F1 "Conn_01x05" 0 -300 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_??x*mm* + Connector*:*1x??x*mm* + Pin?Header?Straight?1X* + Pin?Header?Angled?1X* + Socket?Strip?Straight?1X* + Socket?Strip?Angled?1X* +$ENDFPLIST +DRAW +S -50 -195 0 -205 1 1 6 N +S -50 -95 0 -105 1 1 6 N +S -50 5 0 -5 1 1 6 N +S -50 105 0 95 1 1 6 N +S -50 205 0 195 1 1 6 N +S -50 250 50 -250 1 1 10 f +X Pin_1 1 -200 200 150 R 50 50 1 1 P +X Pin_2 2 -200 100 150 R 50 50 1 1 P +X Pin_3 3 -200 0 150 R 50 50 1 1 P +X Pin_4 4 -200 -100 150 R 50 50 1 1 P +X Pin_5 5 -200 -200 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Crystal_GND24 +# +DEF Crystal_GND24 Y 0 40 Y N 1 F N +F0 "Y" 125 200 50 H V L CNN +F1 "Crystal_GND24" 125 125 50 H V L CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Crystal* +$ENDFPLIST +DRAW +S -45 100 45 -100 0 1 12 N +P 2 0 1 0 -100 0 -80 0 N +P 2 0 1 20 -80 -50 -80 50 N +P 2 0 1 0 0 -150 0 -140 N +P 2 0 1 0 0 140 0 150 N +P 2 0 1 20 80 -50 80 50 N +P 2 0 1 0 80 0 100 0 N +P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N +P 4 0 1 0 -100 90 -100 140 100 140 100 90 N +X 1 1 -150 0 50 R 50 50 1 1 P +X 2 2 0 200 50 D 50 50 1 1 P +X 3 3 150 0 50 L 50 50 1 1 P +X 4 4 0 -200 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# LED +# +DEF LED D 0 40 Y N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "LED" 0 -100 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + LED* +$ENDFPLIST +DRAW +P 2 0 1 8 -50 -50 -50 50 N +P 2 0 1 0 -50 0 50 0 N +P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N +P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N +P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N +X K 1 -150 0 100 R 50 50 1 1 P +X A 2 150 0 100 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# MIC5319 +# +DEF MIC5319 U 0 40 Y Y 1 F N +F0 "U" 200 -300 60 H V C CNN +F1 "MIC5319" 0 250 60 H V C CNN +F2 "" 450 -400 60 H V C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -250 -200 300 150 0 1 0 f +X VIN 1 -550 50 300 R 50 50 1 1 W +X GND 2 0 -500 300 U 50 50 1 1 W +X EN 3 -550 -100 300 R 50 50 1 1 I +X BYP 4 600 -100 300 L 50 50 1 1 P +X VOUT 5 600 50 300 L 50 50 1 1 w +ENDDRAW +ENDDEF +# +# MICRO-USB-B-SMD +# +DEF MICRO-USB-B-SMD U 0 40 Y Y 1 F N +F0 "U" 100 -450 60 H V C CNN +F1 "MICRO-USB-B-SMD" -150 350 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -500 300 200 -300 0 1 0 f +X VBUS 1 500 200 300 L 50 50 1 1 w +X DM 2 500 100 300 L 50 50 1 1 B +X DP 3 500 0 300 L 50 50 1 1 B +X ID 4 500 -100 300 L 50 50 1 1 O +X GND 5 500 -200 300 L 50 50 1 1 W +X SH1 6 -100 -600 300 U 50 50 1 1 P +X SH2 7 -200 -600 300 U 50 50 1 1 P +X SH3 8 -300 -600 300 U 50 50 1 1 P +X SH4 9 -400 -600 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 75 50 H I C CNN +F1 "PWR_FLAG" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +X pwr 1 0 0 0 U 50 50 0 0 w +P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny.kicad_pcb b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.kicad_pcb new file mode 100644 index 0000000..b6c227e --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.kicad_pcb @@ -0,0 +1,1379 @@ +(kicad_pcb (version 4) (host pcbnew 4.0.7+dfsg1-1) + + (general + (links 83) + (no_connects 0) + (area 50.03038 25.3746 97.391945 61.842831) + (thickness 0.8) + (drawings 24) + (tracks 345) + (zones 0) + (modules 27) + (nets 22) + ) + + (page User 152.4 101.6) + (title_block + (title "fx2grok-tiny 0.2") + (date 2017-09-23) + (rev 1) + (company http://www.sigrok.org/wiki/Fx2grok) + (comment 1 "Open Hardware, CC-BY-SA 3.0") + ) + + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (34 B.Paste user hide) + (35 F.Paste user hide) + (36 B.SilkS user hide) + (37 F.SilkS user hide) + (38 B.Mask user hide) + (39 F.Mask user hide) + (40 Dwgs.User user) + (44 Edge.Cuts user) + ) + + (setup + (last_trace_width 0.127) + (trace_clearance 0.1524) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.127) + (segment_width 0.381) + (edge_width 0.0254) + (via_size 0.44958) + (via_drill 0.20066) + (via_min_size 0.44958) + (via_min_drill 0.20066) + (uvia_size 0.508) + (uvia_drill 0.127) + (uvias_allowed no) + (uvia_min_size 0.508) + (uvia_min_drill 0.127) + (pcb_text_width 0.3048) + (pcb_text_size 1.524 2.032) + (mod_edge_width 0.381) + (mod_text_size 1.524 1.524) + (mod_text_width 0.3048) + (pad_size 1.89992 1.89992) + (pad_drill 0) + (pad_to_mask_clearance 0.0508) + (aux_axis_origin 0 0) + (grid_origin 67.70116 50.7492) + (visible_elements FFFFFF19) + (pcbplotparams + (layerselection 0x010cc_80000001) + (usegerberextensions true) + (usegerberattributes true) + (excludeedgelayer true) + (linewidth 0.150000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 0) + (psnegative false) + (psa4output false) + (plotreference false) + (plotvalue false) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory fx2grok-tiny-0.2-gerber-files)) + ) + + (net 0 "") + (net 1 +5V) + (net 2 /DM) + (net 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(model smd\chip_cms.wrl + (at (xyz 0 0 0.002)) + (scale (xyz 0.05 0.05 0.05)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0402 (layer F.Cu) (tedit 59C64851) (tstamp 4FCBF572) + (at 74.93 38.735 180) + (path /4FCAA85F) + (attr smd) + (fp_text reference C14 (at -0.00508 -0.75692 180) (layer F.SilkS) + (effects (font (size 0.3048 0.3048) (thickness 0.0762))) + ) + (fp_text value 1uF (at 0.04064 0 180) (layer F.SilkS) hide + (effects (font (size 0.2048 0.2048) (thickness 0.0512))) + ) + (fp_line (start -0.254 -0.381) (end -0.762 -0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start -0.762 0.381) (end -0.254 0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127)) + (pad 1 smd rect (at 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0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3)) + (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 19 GND)) + (model smd\chip_cms.wrl + (at (xyz 0 0 0.002)) + (scale (xyz 0.05 0.05 0.05)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0402 (layer F.Cu) (tedit 59C64854) (tstamp 4FCBF574) + (at 71.374 38.735 180) + (path /4FCAAEBC) + (attr smd) + (fp_text reference D1 (at -0.03556 -0.7366 180) (layer F.SilkS) + (effects (font (size 0.3048 0.3048) (thickness 0.0762))) + ) + (fp_text value LED1 (at 0.01524 0 180) (layer F.SilkS) hide + (effects (font (size 0.2048 0.2048) (thickness 0.0512))) + ) + (fp_line (start -0.254 -0.381) (end -0.762 -0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start -0.762 0.381) (end -0.254 0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127)) + (fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask) + (net 21 "Net-(D1-Pad1)")) + (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask) + (net 19 GND)) + (model smd\chip_cms.wrl + (at (xyz 0 0 0.002)) + (scale (xyz 0.05 0.05 0.05)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SOT23-5 (layer F.Cu) (tedit 59B1BFB7) (tstamp 4FCBF54B) + (at 75.15098 41.39946 270) + (path /4FCAA78E) + (attr smd) + (fp_text reference U2 (at -0.00762 -1.76022 360) (layer F.SilkS) + (effects (font (size 0.435 0.435) (thickness 0.10875))) + ) + (fp_text value MIC5504 (at 18.2499 23.25116 270) (layer F.SilkS) hide + (effects (font (size 0.635 0.635) (thickness 0.127))) + ) + (fp_line (start 1.524 -0.889) (end 1.524 0.889) (layer F.SilkS) (width 0.127)) + (fp_line (start 1.524 0.889) (end -1.524 0.889) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.524 0.889) (end -1.524 -0.889) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.524 -0.889) (end 1.524 -0.889) (layer F.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.9525 1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask) + (net 1 +5V)) + (pad 3 smd rect (at 0.9525 1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask) + (net 1 +5V)) + (pad 5 smd rect (at -0.9525 -1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask) + (net 20 +3V3)) + (pad 2 smd rect (at 0 1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask) + (net 19 GND)) + (pad 4 smd rect (at 0.9525 -1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask)) + (model smd/SOT23_5.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module QFN56 (layer B.Cu) (tedit 4FCBF74A) (tstamp 4FCE8310) + (at 73.1012 43.8658 270) + (path /4FC8F245) + (fp_text reference IC1 (at 0 -0.50038 270) (layer B.SilkS) hide + (effects (font (thickness 0.3048)) (justify mirror)) + ) + (fp_text value CY7C68013A-56 (at 0.59944 21.69922 270) (layer B.SilkS) hide + (effects (font (thickness 0.3048)) (justify mirror)) + ) + (pad "" smd rect (at 0 0 270) (size 4.8006 5.4991) (layers B.Cu B.Paste B.Mask) + (clearance 0.01016)) + (pad 28 smd rect (at -3.25374 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 27 smd rect (at -2.75336 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 26 smd rect (at -2.25298 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 25 smd rect (at -1.7526 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 12 /PB7) (clearance 0.09906)) + (pad 24 smd rect (at -1.25476 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 11 /PB6) (clearance 0.09906)) + (pad 23 smd rect (at -0.75438 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 10 /PB5) (clearance 0.09906)) + (pad 22 smd rect (at -0.254 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 9 /PB4) (clearance 0.09906)) + (pad 21 smd rect (at 0.24638 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 8 /PB3) (clearance 0.09906)) + (pad 20 smd rect (at 0.74676 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 7 /PB2) (clearance 0.09906)) + (pad 19 smd rect (at 1.24714 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 6 /PB1) (clearance 0.09906)) + (pad 18 smd rect (at 1.74752 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 5 /PB0) (clearance 0.09906)) + (pad 17 smd rect (at 2.2479 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 16 smd rect (at 2.74574 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 15 /SDA) (clearance 0.09906)) + (pad 15 smd rect (at 3.24612 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 14 /SCL) (clearance 0.09906)) + (pad 29 smd rect (at -3.85318 -3.24612 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 30 smd rect (at -3.85318 -2.74574 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 31 smd rect (at -3.85318 -2.24536 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 32 smd rect (at -3.85318 -1.74498 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 33 smd rect (at -3.85318 -1.2446 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 4 /PA0) (clearance 0.09906)) + (pad 34 smd rect (at -3.85318 -0.74422 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 35 smd rect (at -3.85318 -0.24384 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 36 smd rect (at -3.85318 0.254 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 37 smd rect (at -3.85318 0.75438 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 38 smd rect (at -3.85318 1.25476 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 39 smd rect (at -3.85318 1.75514 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 40 smd rect (at -3.85318 2.25552 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 41 smd rect (at -3.85318 2.7559 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 42 smd rect (at -3.85318 3.25374 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 13 /RESET#) (clearance 0.09906)) + (pad 43 smd rect (at -3.25374 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 44 smd rect (at -2.80162 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 16 /WAKEUP) (clearance 0.09906)) + (pad 45 smd rect (at -2.30378 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 46 smd rect (at -1.8034 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 47 smd rect (at -1.30302 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 48 smd rect (at -0.80264 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 49 smd rect (at -0.30226 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 50 smd rect (at 0.19812 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 51 smd rect (at 0.6985 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 52 smd rect (at 1.19634 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 53 smd rect (at 1.69672 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 54 smd rect (at 2.1971 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 55 smd rect (at 2.69748 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 56 smd rect (at 3.19786 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 1 smd rect (at 3.7973 3.25628 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 2 smd rect (at 3.7973 2.7559 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 3 smd rect (at 3.7973 2.25552 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 4 smd rect (at 3.7973 1.75514 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 18 /XTALOUT) (clearance 0.09906)) + (pad 5 smd rect (at 3.7973 1.25476 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 17 /XTALIN) (clearance 0.09906)) + (pad 6 smd rect (at 3.7973 0.75438 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 7 smd rect (at 3.7973 0.254 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 8 smd rect (at 3.7973 -0.24384 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 3 /DP) (clearance 0.09906)) + (pad 9 smd rect (at 3.7973 -0.74422 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 2 /DM) (clearance 0.09906)) + (pad 10 smd rect (at 3.7973 -1.2446 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 11 smd rect (at 3.7973 -1.74498 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3) (clearance 0.09906)) + (pad 12 smd rect (at 3.7973 -2.24536 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + (pad 13 smd rect (at 3.7973 -2.74574 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (clearance 0.09906)) + (pad 14 smd rect (at 3.7973 -3.24612 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask) + (net 19 GND) (clearance 0.09906)) + ) + + (module SM0402 (layer B.Cu) (tedit 59C647D2) (tstamp 4FCBF580) + (at 79.63916 39.0652 270) + (path /4FCAA863) + (attr smd) + (fp_text reference C16 (at 0 -0.7112 270) (layer B.SilkS) + (effects (font (size 0.3048 0.3048) (thickness 0.0762)) (justify mirror)) + ) + (fp_text value 1uF (at 0 0 270) (layer B.SilkS) hide + (effects (font (size 0.2048 0.2048) (thickness 0.0512)) (justify mirror)) + ) + (fp_line (start -0.254 0.381) (end -0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 -0.381) (end -0.254 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3)) + (pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 19 GND)) + (model smd\chip_cms.wrl + (at (xyz 0 0 0.002)) + (scale (xyz 0.05 0.05 0.05)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0402 (layer B.Cu) (tedit 59C647E4) (tstamp 4FCBF56E) + (at 75.311 38.481) + (path /4FCA97A0) + (attr smd) + (fp_text reference C13 (at 0 0.7112) (layer B.SilkS) + (effects (font (size 0.3048 0.3048) (thickness 0.0762)) (justify mirror)) + ) + (fp_text value 100nF (at -0.01524 0) (layer B.SilkS) hide + (effects (font (size 0.2048 0.2048) (thickness 0.0512)) (justify mirror)) + ) + (fp_line (start -0.254 0.381) (end -0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 -0.381) (end -0.254 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3)) + (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 19 GND)) + (model smd\chip_cms.wrl + (at (xyz 0 0 0.002)) + (scale (xyz 0.05 0.05 0.05)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0402 (layer B.Cu) (tedit 59C647EB) (tstamp 4FCBF56A) + (at 71.12 38.862 180) + (path /4FCAA3E6) + (attr smd) + (fp_text reference R2 (at 0.01016 0.71628 180) (layer B.SilkS) + (effects (font (size 0.3048 0.3048) (thickness 0.0762)) (justify mirror)) + ) + (fp_text value 2K7 (at 0.06604 0.0254 180) (layer B.SilkS) hide + (effects (font (size 0.2048 0.2048) (thickness 0.0512)) (justify mirror)) + ) + (fp_line (start -0.254 0.381) (end -0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 -0.381) (end -0.254 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3)) + (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 13 /RESET#)) + (model smd\chip_cms.wrl + (at (xyz 0 0 0.002)) + (scale (xyz 0.05 0.05 0.05)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0402 (layer B.Cu) (tedit 59C64810) (tstamp 4FCE905B) + (at 75.692 50.165) + (path /4FCA9793) + (attr smd) + (fp_text reference C7 (at 1.23952 0.06604) (layer B.SilkS) + (effects (font (size 0.3048 0.3048) (thickness 0.0762)) (justify mirror)) + ) + (fp_text value 100nF (at 0.01016 0) (layer B.SilkS) hide + (effects (font (size 0.2048 0.2048) (thickness 0.0512)) (justify mirror)) + ) + (fp_line (start -0.254 0.381) (end -0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.762 -0.381) (end -0.254 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127)) + (fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 20 +3V3)) + (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask) + (net 19 GND)) + (model smd\chip_cms.wrl + (at (xyz 0 0 0.002)) + (scale (xyz 0.05 0.05 0.05)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0402 (layer B.Cu) (tedit 59C6480D) (tstamp 4FCBF564) + (at 75.692 48.768) + (path /4FCA96AB) + (attr smd) + (fp_text reference C2 (at 0 0.69088) (layer B.SilkS) + (effects (font (size 0.3048 0.3048) (thickness 0.0762)) (justify mirror)) + ) + (fp_text value 100nF (at -0.04064 0) (layer B.SilkS) hide + (effects (font (size 0.2048 0.2048) (thickness 0.0512)) (justify mirror)) + ) + (fp_line (start -0.254 0.381) (end -0.762 0.381) (layer B.SilkS) (width 0.127)) + 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PA7/FLAGD/~SLCS 40 1300 600 300 L 50 50 1 1 B +X PD5/FD13 50 1300 -1000 300 L 50 50 1 1 B +X VCC 11 -500 1700 300 D 50 50 1 1 W +X PB3/FD3 21 1300 100 300 L 50 50 1 1 B +X CTL2/FLAGC 31 -1400 -400 300 R 50 50 1 1 O +X GND 41 -200 -1500 300 U 50 50 1 1 W +X PD6/FD14 51 1300 -1100 300 L 50 50 1 1 B +X GND 12 -500 -1500 300 U 50 50 1 1 W +X PB4/FD4 22 1300 0 300 L 50 50 1 1 B +X VCC 32 -200 1700 300 D 50 50 1 1 W +X ~RESET 42 -1400 -600 300 R 50 50 1 1 I I +X PD7/FD15 52 1300 -1200 300 L 50 50 1 1 B +X IFCLK 13 -1400 400 300 R 50 50 1 1 B C +X PB5/FD5 23 1300 -100 300 L 50 50 1 1 B +X PA0/~INT0 33 1300 1300 300 L 50 50 1 1 B +X VCC 43 -100 1700 300 D 50 50 1 1 W +X GND 53 -100 -1500 300 U 50 50 1 1 W +X RESERVED 14 -1400 -1000 300 R 50 50 1 1 I +X PB6/FD6 24 1300 -200 300 L 50 50 1 1 B +X PA1/~INT1 34 1300 1200 300 L 50 50 1 1 B +X WAKEUP 44 -1400 -800 300 R 50 50 1 1 I +X CLKOUT 54 -1400 300 300 R 50 50 1 1 O C +X SCL 15 -1400 100 300 R 50 50 1 1 O +X PB7/FD7 25 1300 -300 300 L 50 50 1 1 B +X PA2/SLOE 35 1300 1100 300 L 50 50 1 1 B +X PD0/FD8 45 1300 -500 300 L 50 50 1 1 B +X VCC 55 0 1700 300 D 50 50 1 1 W +X SDA 16 -1400 0 300 R 50 50 1 1 B +X GND 26 -400 -1500 300 U 50 50 1 1 W +X PA3/WU2 36 1300 1000 300 L 50 50 1 1 B +X PD1/FD9 46 1300 -600 300 L 50 50 1 1 B +X GND 56 0 -1500 300 U 50 50 1 1 W +X VCC 17 -400 1700 300 D 50 50 1 1 W +X VCC 27 -300 1700 300 D 50 50 1 1 W +X PA4/FIFOADR0 37 1300 900 300 L 50 50 1 1 B +X PD2/FD10 47 1300 -700 300 L 50 50 1 1 B +X PB0/FD0 18 1300 400 300 L 50 50 1 1 B +X GND 28 -300 -1500 300 U 50 50 1 1 W +X PA5/FIFOADR1 38 1300 800 300 L 50 50 1 1 B +X PD3/FD11 48 1300 -800 300 L 50 50 1 1 B +X PB1/FD1 19 1300 300 300 L 50 50 1 1 B +X CTL0/FLAGA 29 -1400 -200 300 R 50 50 1 1 O +X PA6/PKTEND 39 1300 700 300 L 50 50 1 1 B +X PD4/FD12 49 1300 -900 300 L 50 50 1 1 B +ENDDRAW +ENDDEF +# +# MIC5319 +# +DEF MIC5319 U 0 40 Y Y 1 F N +F0 "U" 200 -300 60 H V C CNN +F1 "MIC5319" 0 250 60 H V C CNN +F2 "~" 450 -400 60 H V C CNN +DRAW +S -250 -200 300 150 0 1 0 f +X VIN 1 -550 50 300 R 50 50 1 1 W +X GND 2 0 -500 300 U 50 50 1 1 W +X EN 3 -550 -100 300 R 50 50 1 1 I +X BYP 4 600 -100 300 L 50 50 1 1 P +X VOUT 5 600 50 300 L 50 50 1 1 w +ENDDRAW +ENDDEF +# +# MICRO-USB-B-SMD +# +DEF MICRO-USB-B-SMD U 0 40 Y Y 1 F N +F0 "U" 100 -450 60 H V C CNN +F1 "MICRO-USB-B-SMD" -150 350 60 H V C CNN +DRAW +S -500 300 200 -300 0 1 0 f +X VBUS 1 500 200 300 L 50 50 1 1 w +X DM 2 500 100 300 L 50 50 1 1 B +X DP 3 500 0 300 L 50 50 1 1 B +X ID 4 500 -100 300 L 50 50 1 1 O +X GND 5 500 -200 300 L 50 50 1 1 W +X SH1 6 -100 -600 300 U 50 50 1 1 P +X SH2 7 -200 -600 300 U 50 50 1 1 P +X SH3 8 -300 -600 300 U 50 50 1 1 P +X SH4 9 -400 -600 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/ABM11.kicad_mod b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/ABM11.kicad_mod new file mode 100644 index 0000000..9f78ea8 --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/ABM11.kicad_mod @@ -0,0 +1,16 @@ +(module ABM11 (layer F.Cu) (tedit 4FCBBD24) + (fp_text reference ABM11 (at 0 6.72592) (layer F.SilkS) + (effects (font (thickness 0.3048))) + ) + (fp_text value VAL** (at 0 -4.7498) (layer F.SilkS) + (effects (font (thickness 0.3048))) + ) + (pad 1 smd rect (at -0.65024 0.50038) (size 0.7493 0.65024) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 2 smd rect (at 0.6477 0.50038) (size 0.7493 0.65024) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 3 smd rect (at 0.6477 -0.50038) (size 0.7493 0.65024) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 4 smd rect (at -0.65024 -0.50038) (size 0.7493 0.65024) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) +) diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/CONN-5x1-SMD-127MM.kicad_mod b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/CONN-5x1-SMD-127MM.kicad_mod new file mode 100644 index 0000000..c389dc2 --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/CONN-5x1-SMD-127MM.kicad_mod @@ -0,0 +1,18 @@ +(module CONN-5x1-SMD-127MM (layer F.Cu) (tedit 59B14D2B) + (fp_text reference CONN-5x1-SMD-127MM (at 0.0762 9.42594) (layer F.SilkS) + (effects (font (thickness 0.3048))) + ) + (fp_text value VAL** (at -0.0508 -8.8011) (layer F.SilkS) + (effects (font (thickness 0.3048))) + ) + (pad 1 smd rect (at -2.17932 0.16002) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask) + (clearance 0.0508)) + (pad 2 smd rect (at -0.90424 0.16002) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask) + (clearance 0.0508)) + (pad 3 smd rect (at 0.37084 0.16002) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask) + (clearance 0.0508)) + (pad 4 smd rect (at 1.64592 0.16002) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask) + (clearance 0.0508)) + (pad 5 smd rect (at 2.921 0.16002) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask) + (clearance 0.0508)) +) diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/MICRO-USB-B-SMD.kicad_mod b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/MICRO-USB-B-SMD.kicad_mod new file mode 100644 index 0000000..d784fec --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/MICRO-USB-B-SMD.kicad_mod @@ -0,0 +1,30 @@ +(module MICRO-USB-B-SMD (layer F.Cu) (tedit 59B2840B) + (fp_text reference U1 (at -0.28956 -2.60604 90) (layer F.SilkS) + (effects (font (size 0.524 0.524) (thickness 0.1048))) + ) + (fp_text value MICRO-USB-B-SMD (at -0.03048 -5.1689) (layer F.SilkS) hide + (effects (font (thickness 0.3048))) + ) + (pad 1 smd rect (at -1.30048 -0.94996) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 2 smd rect (at -0.65024 -0.94996) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 3 smd rect (at 0 -0.94996) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 4 smd rect (at 0.65024 -0.94996) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 5 smd rect (at 1.30048 -0.94996) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 9 smd rect (at -3.0988 -0.8509) (size 2.10058 1.6002) (layers F.Cu F.Paste F.Mask) + (clearance 0.29972)) + (pad 6 smd rect (at 3.10134 -0.8509) (size 2.10058 1.6002) (layers F.Cu F.Paste F.Mask) + (clearance 0.29972)) + (pad 7 smd rect (at 3.8989 1.69926) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask) + (clearance 0.29972)) + (pad 8 smd rect (at 1.19888 1.69926) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask) + (clearance 0.29972)) + (pad 8 smd rect (at -1.19888 1.69926) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask) + (clearance 0.29972)) + (pad 8 smd rect (at -3.8989 1.69926) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask) + (clearance 0.29972)) +) diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/QFN56.kicad_mod b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/QFN56.kicad_mod new file mode 100644 index 0000000..6b2f0de --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pretty/QFN56.kicad_mod @@ -0,0 +1,122 @@ +(module QFN56 (layer F.Cu) (tedit 4FCBEA5C) + (fp_text reference QFN56 (at -2.90068 2.64922) (layer F.SilkS) hide + (effects (font (thickness 0.3048))) + ) + (fp_text value VAL** (at -2.99974 -9.25068) (layer F.SilkS) hide + (effects (font (thickness 0.3048))) + ) + (pad "" smd rect (at 0 0) (size 4.8006 5.4991) (layers F.Cu F.Paste F.Mask) + (clearance 0.01016)) + (pad 28 smd rect (at -3.25374 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 27 smd rect (at -2.75336 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 26 smd rect (at -2.25298 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 25 smd rect (at -1.7526 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 24 smd rect (at -1.25476 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 23 smd rect (at -0.75438 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 22 smd rect (at -0.254 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 21 smd rect (at 0.24638 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 20 smd rect (at 0.74676 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 19 smd rect (at 1.24714 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 18 smd rect (at 1.74752 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 17 smd rect (at 2.2479 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 16 smd rect (at 2.74574 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 15 smd rect (at 3.24612 3.84556) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 29 smd rect (at -3.85318 3.24612) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 30 smd rect (at -3.85318 2.74574) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 31 smd rect (at -3.85318 2.24536) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 32 smd rect (at -3.85318 1.74498) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 33 smd rect (at -3.85318 1.2446) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 34 smd rect (at -3.85318 0.74422) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 35 smd rect (at -3.85318 0.24384) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 36 smd rect (at -3.85318 -0.254) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 37 smd rect (at -3.85318 -0.75438) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 38 smd rect (at -3.85318 -1.25476) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 39 smd rect (at -3.85318 -1.75514) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 40 smd rect (at -3.85318 -2.25552) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 41 smd rect (at -3.85318 -2.7559) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 42 smd rect (at -3.85318 -3.25374) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 43 smd rect (at -3.25374 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 44 smd rect (at -2.80162 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 45 smd rect (at -2.30378 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 46 smd rect (at -1.8034 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 47 smd rect (at -1.30302 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 48 smd rect (at -0.80264 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 49 smd rect (at -0.30226 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 50 smd rect (at 0.19812 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 51 smd rect (at 0.6985 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 52 smd rect (at 1.19634 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 53 smd rect (at 1.69672 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 54 smd rect (at 2.1971 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 55 smd rect (at 2.69748 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 56 smd rect (at 3.19786 -3.85572) (size 0.2794 0.69088) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 1 smd rect (at 3.7973 -3.25628) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 2 smd rect (at 3.7973 -2.7559) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 3 smd rect (at 3.7973 -2.25552) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 4 smd rect (at 3.7973 -1.75514) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 5 smd rect (at 3.7973 -1.25476) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 6 smd rect (at 3.7973 -0.75438) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 7 smd rect (at 3.7973 -0.254) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 8 smd rect (at 3.7973 0.24384) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 9 smd rect (at 3.7973 0.74422) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 10 smd rect (at 3.7973 1.2446) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 11 smd rect (at 3.7973 1.74498) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 12 smd rect (at 3.7973 2.24536) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 13 smd rect (at 3.7973 2.74574) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) + (pad 14 smd rect (at 3.7973 3.24612) (size 0.69088 0.2794) (layers F.Cu F.Paste F.Mask) + (clearance 0.09906)) +) diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pro b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pro new file mode 100644 index 0000000..f97d6fd --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.pro @@ -0,0 +1,75 @@ +update=Sun 09 Jul 2017 09:32:57 PM CEST +version=1 +last_client=kicad +[cvpcb] +version=1 +NetIExt=net +[cvpcb/libraries] +EquName1=devcms +[general] +version=1 +[pcbnew] +version=1 +PadDrlX=320 +PadDimH=600 +PadDimV=600 +BoardThickness=630 +TxtPcbV=800 +TxtPcbH=600 +TxtModV=600 +TxtModH=600 +TxtModW=120 +VEgarde=39 +DrawLar=150 +EdgeLar=150 +TxtLar=120 +MSegLar=150 +LastNetListRead=fx2grok-tiny.net +[pcbnew/libraries] +LibDir=../0.2 +LibName1=sockets +LibName2=connect +LibName3=discret +LibName4=pin_array +LibName5=divers +LibName6=libcms +LibName7=display +LibName8=led +LibName9=dip_sockets +LibName10=pga_sockets +LibName11=valves +LibName12=fx2grok-tiny +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=microcontrollers +LibName13=dsp +LibName14=microchip +LibName15=analog_switches +LibName16=motorola +LibName17=texas +LibName18=intel +LibName19=audio +LibName20=interface +LibName21=digital-audio +LibName22=philips +LibName23=display +LibName24=cypress +LibName25=siliconi +LibName26=opto +LibName27=atmel +LibName28=contrib +LibName29=valves +LibName30=fx2grok-tiny diff --git a/hardware/fx2grok-tiny/0.2/fx2grok-tiny.sch b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.sch new file mode 100644 index 0000000..84fa7a4 --- /dev/null +++ b/hardware/fx2grok-tiny/0.2/fx2grok-tiny.sch @@ -0,0 +1,1195 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:fx2grok-tiny +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "fx2grok 0.2" +Date "2017-09-23" +Rev "1" +Comp "http://www.sigrok.org/wiki/Fx2grok" +Comment1 "Open Hardware, CC-BY-SA 3.0" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L R R3 +U 1 1 5151D52F +P 2700 4000 +F 0 "R3" V 2780 4000 50 0000 C CNN +F 1 "2K7" V 2700 4000 50 0000 C CNN +F 2 "SM0402" H 2700 4000 60 0001 C CNN +F 3 "" H 2700 4000 60 0001 C CNN + 1 2700 4000 + 0 1 1 0 +$EndComp +Text Notes 8050 3400 0 60 ~ 0 +5x2 1.27mm pin header (5 pins per PCB side) +Text Label 7400 4100 0 60 ~ 0 +PB7 +Text Label 7400 4000 0 60 ~ 0 +PB6 +Text Label 7400 3900 0 60 ~ 0 +PB5 +Text Label 7400 3800 0 60 ~ 0 +PB4 +Text Label 7400 3700 0 60 ~ 0 +PB3 +Text Label 7400 3600 0 60 ~ 0 +PB2 +Text Label 7400 3500 0 60 ~ 0 +PB1 +Text Label 7400 3400 0 60 ~ 0 +PB0 +Text Label 5450 6200 0 60 ~ 0 +PA0 +Text Label 7400 2500 0 60 ~ 0 +PA0 +NoConn ~ 7300 4300 +NoConn ~ 7300 4400 +Text Label 9600 2850 0 60 ~ 0 +PB7 +Text Label 9600 2750 0 60 ~ 0 +PB5 +Text Label 9600 2650 0 60 ~ 0 +PB3 +Text Label 8550 2850 2 60 ~ 0 +PB6 +Text Label 8550 2750 2 60 ~ 0 +PB4 +Text Label 9600 2550 0 60 ~ 0 +PB1 +Text Label 8550 2650 2 60 ~ 0 +PB2 +Text Label 8550 2550 2 60 ~ 0 +PB0 +$Comp +L C C1 +U 1 1 4FCBEB98 +P 950 5000 +F 0 "C1" H 1000 5100 50 0000 L CNN +F 1 "1uF" H 1000 4900 50 0000 L CNN +F 2 "SM0402" H 950 5000 60 0001 C CNN +F 3 "" H 950 5000 60 0001 C CNN + 1 950 5000 + 1 0 0 -1 +$EndComp +NoConn ~ 4600 3400 +NoConn ~ 4600 3500 +NoConn ~ 4600 4000 +NoConn ~ 4600 4100 +NoConn ~ 4600 4200 +Text Notes 9450 1050 0 60 ~ 0 +Kicad-internal stuff, ignore +$Comp +L PWR_FLAG #FLG1 +U 1 1 4FCB8E1B +P 10100 1300 +F 0 "#FLG1" H 10100 1395 30 0001 C CNN +F 1 "PWR_FLAG" H 10100 1480 30 0000 C CNN +F 2 "" H 10100 1300 60 0001 C CNN +F 3 "" H 10100 1300 60 0001 C CNN + 1 10100 1300 + 1 0 0 -1 +$EndComp +Text Notes 5100 6500 0 60 ~ 0 +LED\n +$Comp +L R R5 +U 1 1 4FCAAEBE +P 5200 6200 +F 0 "R5" V 5280 6200 50 0000 C CNN +F 1 "2K7" V 5200 6200 50 0000 C CNN +F 2 "SM0402" H 5200 6200 60 0001 C CNN +F 3 "" H 5200 6200 60 0001 C CNN + 1 5200 6200 + 0 -1 -1 0 +$EndComp +$Comp +L LED D1 +U 1 1 4FCAAEBC +P 4800 6200 +F 0 "D1" H 4800 6300 50 0000 C CNN +F 1 "LED1" H 4800 6100 50 0000 C CNN +F 2 "SM0402" H 4800 6200 60 0001 C CNN +F 3 "" H 4800 6200 60 0001 C CNN + 1 4800 6200 + -1 0 0 1 +$EndComp +$Comp +L C C16 +U 1 1 4FCAA863 +P 10350 5800 +F 0 "C16" H 10400 5900 50 0000 L CNN +F 1 "1uF" H 10400 5700 50 0000 L CNN +F 2 "SM0402" H 10350 5800 60 0001 C CNN +F 3 "" H 10350 5800 60 0001 C CNN + 1 10350 5800 + 1 0 0 -1 +$EndComp +$Comp +L C C14 +U 1 1 4FCAA85F +P 8800 5800 +F 0 "C14" H 8850 5900 50 0000 L CNN +F 1 "1uF" H 8850 5700 50 0000 L CNN +F 2 "SM0402" H 8800 5800 60 0001 C CNN +F 3 "" H 8800 5800 60 0001 C CNN + 1 8800 5800 + 1 0 0 -1 +$EndComp +$Comp +L MIC5319 U2 +U 1 1 4FCAA78E +P 9550 5450 +F 0 "U2" H 9750 5150 60 0000 C CNN +F 1 "MIC5504" H 9550 5700 60 0000 C CNN +F 2 "SOT23-5" H 9200 4800 60 0001 C CNN +F 3 "" H 9550 5450 60 0001 C CNN + 1 9550 5450 + 1 0 0 -1 +$EndComp +$Comp +L MICRO-USB-B-SMD U1 +U 1 1 4FCAA5E6 +P 1550 1100 +F 0 "U1" H 1650 650 60 0000 C CNN +F 1 "MICRO-USB-B-SMD" H 1400 1450 60 0000 C CNN +F 2 "MICRO-USB-B-SMD" H 1550 1100 60 0001 C CNN +F 3 "" H 1550 1100 60 0001 C CNN + 1 1550 1100 + 1 0 0 -1 +$EndComp +Text Label 4500 4400 2 60 ~ 0 +RESET# +Text Label 1450 4750 0 60 ~ 0 +RESET# +$Comp +L R R2 +U 1 1 4FCAA3E6 +P 1200 4750 +F 0 "R2" V 1280 4750 50 0000 C CNN +F 1 "2K7" V 1200 4750 50 0000 C CNN +F 2 "SM0402" H 1200 4750 60 0001 C CNN +F 3 "" H 1200 4750 60 0001 C CNN + 1 1200 4750 + 0 -1 -1 0 +$EndComp +Text Notes 2250 5050 2 60 ~ 0 +RESET# is tied to VCC\nvia 2K7 and 1uF +Text Label 1450 4000 0 60 ~ 0 +WAKEUP +Text Notes 1900 4250 2 60 ~ 0 +WAKEUP is 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C6 +U 1 1 4FCA9C79 +P 1600 7050 +F 0 "C6" H 1650 7150 50 0000 L CNN +F 1 "2.2uF" V 1700 6750 50 0000 L CNN +F 2 "SM0402" H 1600 7050 60 0001 C CNN +F 3 "" H 1600 7050 60 0001 C CNN + 1 1600 7050 + 1 0 0 -1 +$EndComp +$Comp +L C C3 +U 1 1 4FCA9C5D +P 1300 7050 +F 0 "C3" H 1350 7150 50 0000 L CNN +F 1 "2.2uF" V 1400 6750 50 0000 L CNN +F 2 "SM0402" H 1300 7050 60 0001 C CNN +F 3 "" H 1300 7050 60 0001 C CNN + 1 1300 7050 + 1 0 0 -1 +$EndComp +Text Notes 1100 6450 0 60 ~ 0 +100nF bypass capacitors for all VCC pins\n +$Comp +L C C13 +U 1 1 4FCA97A0 +P 2800 5850 +F 0 "C13" H 2850 5950 50 0000 L CNN +F 1 "100nF" V 2900 5550 50 0000 L CNN +F 2 "SM0402" H 2800 5850 60 0001 C CNN +F 3 "" H 2800 5850 60 0001 C CNN + 1 2800 5850 + 1 0 0 -1 +$EndComp +$Comp +L C C12 +U 1 1 4FCA9799 +P 2500 5850 +F 0 "C12" H 2550 5950 50 0000 L CNN +F 1 "100nF" V 2600 5550 50 0000 L CNN +F 2 "SM0402" H 2500 5850 60 0001 C CNN +F 3 "" H 2500 5850 60 0001 C CNN + 1 2500 5850 + 1 0 0 -1 +$EndComp +$Comp +L C C7 +U 1 1 4FCA9793 +P 1900 5850 +F 0 "C7" H 1950 5950 50 0000 L CNN +F 1 "100nF" V 2000 5550 50 0000 L CNN +F 2 "SM0402" H 1900 5850 60 0001 C CNN +F 3 "" H 1900 5850 60 0001 C CNN + 1 1900 5850 + 1 0 0 -1 +$EndComp +$Comp +L C C5 +U 1 1 4FCA9777 +P 1600 5850 +F 0 "C5" H 1650 5950 50 0000 L CNN +F 1 "100nF" V 1700 5550 50 0000 L CNN +F 2 "SM0402" H 1600 5850 60 0001 C CNN +F 3 "" H 1600 5850 60 0001 C CNN + 1 1600 5850 + 1 0 0 -1 +$EndComp +$Comp +L C C10 +U 1 1 4FCA9724 +P 2200 5850 +F 0 "C10" H 2250 5950 50 0000 L CNN +F 1 "100nF" V 2300 5550 50 0000 L CNN +F 2 "SM0402" H 2200 5850 60 0001 C CNN +F 3 "" H 2200 5850 60 0001 C CNN + 1 2200 5850 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 4FCA96AB +P 1300 5850 +F 0 "C2" H 1350 5950 50 0000 L CNN +F 1 "100nF" V 1400 5550 50 0000 L CNN +F 2 "SM0402" H 1300 5850 60 0001 C CNN +F 3 "" H 1300 5850 60 0001 C CNN + 1 1300 5850 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 4FCA95B2 +P 1200 4000 +F 0 "R1" V 1280 4000 50 0000 C CNN +F 1 "100K" V 1200 4000 50 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