From: Uwe Hermann <redacted>
Date: Fri, 26 May 2017 20:22:59 +0000 (+0200)
Subject: eeprom24xx: Add an ATtiny13 I²C example dump.
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=44fbf09632f47b3dcfe573377ee550ea00c601df;p=sigrok-dumps.git

eeprom24xx: Add an ATtiny13 I²C example dump.
---

diff --git a/i2c/eeprom_24xx/attiny13_i2c/README b/i2c/eeprom_24xx/attiny13_i2c/README
new file mode 100644
index 0000000..afdb957
--- /dev/null
+++ b/i2c/eeprom_24xx/attiny13_i2c/README
@@ -0,0 +1,32 @@
+-------------------------------------------------------------------------------
+Atmel ATtiny13 I²C
+-------------------------------------------------------------------------------
+
+This is a set of example captures of the I²C traffic to/from the Atmel
+ATtiny13 chip and the Cypress FX2 in the Braintechnology USB-LPS device.
+
+Details:
+http://www.atmel.com/images/doc2535.pdf
+http://www.braintechnology.de/braintechnology/usb_lps.html
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a CWAV USBee SX (at 12MHz):
+
+  Probe       ATtiny13 pin
+  ------------------------
+  0 (black)   PB0
+  1 (brown)   PB1/SDA
+  2 (red)     PB2/SCL
+  3 (orange)  PB3
+  4 (yellow)  PB4
+  5 (green)   PB5
+
+
+Data
+----
+
+The data contains the power-up sequence when the USB cable is attached.
+
diff --git a/i2c/eeprom_24xx/attiny13_i2c/braintechnology_usb_lps_powerup.sr b/i2c/eeprom_24xx/attiny13_i2c/braintechnology_usb_lps_powerup.sr
new file mode 100644
index 0000000..ea6c11f
Binary files /dev/null and b/i2c/eeprom_24xx/attiny13_i2c/braintechnology_usb_lps_powerup.sr differ